regis@google.com
ad8b021182
Process two 32-bit digits as one 64-bit digit in all bigint intrinsics on ARM64.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//817583003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42611 260f80e4-7a28-3924-810f-c04153c831b5
2015-01-05 20:46:48 +00:00
vegorov@google.com
aa48bd4759
Range feedback for arithmetic operations.
...
In addition to tracking input and output ranges in the IC-stubs with a Smi fastpath (SmiAdd and SmiSub, currently) this CL also introduces two IC stubs that have no fast-path by still track ranges and update the range feedback.
We are able to distinguish between the following ranges (encoding of the lattice is shown in the parens):
- u-smi (0000)
- smi (0001)
- uint31 (0010)
- int32 (0011)
- uint32 (0100)
- int64 (1xxx) and (x1x1)
BUG=
R=fschneider@google.com , srdjan@google.com , zra@google.com
Review URL: https://codereview.chromium.org//735543003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42370 260f80e4-7a28-3924-810f-c04153c831b5
2014-12-15 18:48:15 +00:00
regis@google.com
6a2f5e6297
Implement bigint intrinsics on arm64.
...
Implement umaddl arm64 instruction (assembler, disassembler, simulator, tests).
Finish implementing cbz and cbnz arm64 instructions (assembler, tests).
R=zra@google.com
Review URL: https://codereview.chromium.org//701233003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@41608 260f80e4-7a28-3924-810f-c04153c831b5
2014-11-07 17:19:44 +00:00
johnmccutchan@google.com
7bbdfc2e16
- Use UnboxedInt32 and UnboxedUint32 representation for LoadIndexedInstr
...
- Avoid inserting an check class instruction for Uint32 and Int32 arrays on StoreIndexedInstr
- Implement Int32ToDouble on all architectures
- Add Int32 to double instruction to ARM64 and simulator.
- Add Int32 to double instruction to X64.
R=vegorov@google.com , zra@google.com
Review URL: https://codereview.chromium.org//616873003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@41025 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-09 20:49:15 +00:00
regis@google.com
1026872687
Fix 32-bit and 64-bit carry out calculation in arm64 simulator.
...
Add support for 32-bit and 64-bit addition/subtraction with carry on simarm64.
Add assembler tests.
R=zra@google.com
Review URL: https://codereview.chromium.org//630093004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40989 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-08 07:22:06 +00:00
zra@google.com
fb29f5e342
Adds ldp and stp instructions to ARM64.
...
These should be used instead of single
register load and store on frame entry
and exit. I'll update these in another
change.
R=regis@google.com
Review URL: https://codereview.chromium.org//630033003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40960 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-07 16:25:56 +00:00
zra@google.com
240afa6afa
Expands the use of Immediate and Operand wrappers.
...
Since Register is an enum type, it is automatically
coerced to integer types when passed as a parameter to
functions expecting an integer argument. This change
expands the use of Immediate and Operand wrappers
for Assembler instructions and macros to avoid this
automatic coercion.
I've also added dummy constructors to Address and
FieldAddress classes to address the same problem,
but in a way that does not increase verbosity,
since Address and FieldAddress are much more
prevalent in the code.
A cleaner solution would involve making Register
no longer coercable to integer types, but this
would likely require many changes to the Assemblers.
R=regis@google.com
Review URL: https://codereview.chromium.org//593363003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40905 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-03 19:46:24 +00:00
iposva@google.com
cc13627fc8
- Remove Isolate::CurrentAddress().
...
- Remove use of INFINITY and -INFINITY.
R=rmacnak@google.com , srdjan@google.com
Review URL: https://codereview.chromium.org//609593002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40700 260f80e4-7a28-3924-810f-c04153c831b5
2014-09-25 23:39:30 +00:00
rmacnak@google.com
d72161731e
Satisfy new -Wunused-local-typedefs in gcc 4.8 in the simulators.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//356233003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@37823 260f80e4-7a28-3924-810f-c04153c831b5
2014-06-30 17:02:58 +00:00
zra@google.com
a89ae2f947
Uses assembler macro for dart SP setup on arm64.
...
Clean up for last CL.
R=regis@google.com
Review URL: https://codereview.chromium.org//317443004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36950 260f80e4-7a28-3924-810f-c04153c831b5
2014-06-03 21:41:55 +00:00
zra@google.com
436a06a381
Fixes to run "Hello, world!" on arm64 hardware.
...
Primarily, in Dart code, instead of using R31 as our
stack pointer, on entry we copy it into a second
register (R18) and use that as our stack pointer after
moving R31 to the Dart stack limit. On calling back
into C++ from Dart code, R31 is restored, and R18 is
cached in the callee-saved register R26.
R=regis@google.com
Review URL: https://codereview.chromium.org//311903004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36930 260f80e4-7a28-3924-810f-c04153c831b5
2014-06-03 18:38:28 +00:00
regis@google.com
34dc2dce7a
Reduce register pressure on ARM, ARM64, and MIPS.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//300003015
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36764 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-28 20:35:02 +00:00
zra@google.com
6143dd9bad
Adds more ARM64 SIMD instructions.
...
Also, enables simd inlining for arm64.
R=regis@google.com
Review URL: https://codereview.chromium.org//307523002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36694 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-27 16:29:15 +00:00
zra@google.com
0676e14a22
Adds more SIMD instructions to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//295243005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36585 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-23 20:34:29 +00:00
zra@google.com
35d53f5a45
Beings adding SIMD support to arm64.
...
It's still disabled for now, while I continue working.
Also, I tried to use const a bit more consistently in
the arm and arm64 IL.
R=regis@google.com
Review URL: https://codereview.chromium.org//293993013
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36465 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-22 00:17:33 +00:00
zra@google.com
2146126308
Fix bug on arm64.
...
Also increases test timeout to match simarm and simmips.
R=regis@google.com
Review URL: https://codereview.chromium.org//283833005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36175 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-14 16:56:12 +00:00
zra@google.com
5d94e8900f
Adds single-precision and SIMD load/store to arm64.
...
Also adds conversion between double an single-precision floats.
R=regis@google.com
Review URL: https://codereview.chromium.org//269343010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35933 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-08 19:06:04 +00:00
zra@google.com
842a42a5a9
Adds unary double operations to ARM64, enables many tests.
...
Also removes disabling of optimization.
R=regis@google.com
Review URL: https://codereview.chromium.org//267283004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35863 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-07 20:04:05 +00:00
zra@google.com
65946f752c
Adds arm64 double arithmetic instructions.
...
Also adds:
- double comparison instructions,
- conditional increment instruction,
- double <-> int conversion instructions,
- IL instructions that use these,
- NoSuchMethod call stub,
- and bug fixes.
R=regis@google.com
Review URL: https://codereview.chromium.org//262333007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35830 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-06 20:50:44 +00:00
zra@google.com
037a72e059
Enables many language tests for arm64.
...
- Adds msub and smulh instructions for implementing
BinarySmiOp.
- Adds fmovdd to move doubles between V registers.
- Implements many stubs and IL instructions. These are
ported from ARM with small fix-ups. Deopt code comes
from x64 because the stack frame layout is the same.
R=regis@google.com
Review URL: https://codereview.chromium.org//263243002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35753 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-05 18:09:08 +00:00
zra@google.com
568f467c74
Adds double load and store to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//264943007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35672 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-02 00:16:02 +00:00
zra@google.com
5be8150a3a
Begins work on arm64 floating point instructions.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//261783005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35661 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-01 21:50:17 +00:00
zra@google.com
2dee7e5a6d
Enables all startup code for arm64.
...
Also, enables a few more codegen tests, and adds
a conditional move instruction.
R=regis@google.com
Review URL: https://codereview.chromium.org//253623003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35440 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-25 18:54:46 +00:00
zra@google.com
321cec1c57
Fix build for ARM64.
...
Review URL: https://codereview.chromium.org//255543007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35406 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-24 22:08:20 +00:00
zra@google.com
f94ea20502
Adds StoreIntoObject for arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//247023004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35277 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-22 19:44:11 +00:00
zra@google.com
76dfb827cb
Adds load/store from signed, unscaled, 9-bit offset w/ no writeback to arm64.
...
I missed this before because it was in the docs under the assembler mnemonic ldur.
R=regis@google.com
Review URL: https://codereview.chromium.org//242983006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35222 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-21 20:30:27 +00:00
zra@google.com
57abf60fc8
Code patching for ARM64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//241573002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35156 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-17 22:00:11 +00:00
zra@google.com
d128fb91ae
Adds object pool, LoadImmediate, and LoadObject to ARM64.
...
Also enables many object tests.
R=regis@google.com
Review URL: https://codereview.chromium.org//239303008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35109 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-16 15:48:33 +00:00
zra@google.com
1c03aa73a8
Adds more arithmetic ops to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//236173002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35024 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-14 17:03:04 +00:00
zra@google.com
3a21a88e52
Adds comparisons, labels, branches.
...
Also adds compare-and-branch, test-and-branch, and
unconditional branch with 26-bit offset instrucitons
to the disassembler and simulator, but not to the
assembler, yet, since they'll require a bit more
work and this CL is getting big.
R=regis@google.com
Review URL: https://codereview.chromium.org//235363005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34993 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-11 20:40:11 +00:00
zra@google.com
11434b57aa
Adds logical operations to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//231373003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34901 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-09 22:14:47 +00:00
zra@google.com
5ed6eb4cb4
Adds ldr and str to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//227593012
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34831 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-08 15:43:16 +00:00
zra@google.com
dcc2284689
Adds subract, move wide immediate instructions to ARM64.
...
Also adds tests for move, add shift, add extended.
R=regis@google.com
Review URL: https://codereview.chromium.org//214233006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34715 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-03 18:26:11 +00:00
zra@google.com
2fe51715e5
Begins work on ARM64, first assembler test.
...
Most new code is in constants_arm64.h and
{assembler,disassembler,simulator}_arm64.{h,cc}
The rest of the CL just #def's out tests, modifies status files,
and adds UNIMPLEMENTED functions, etc.
R=regis@google.com
Review URL: https://codereview.chromium.org//221133002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34654 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-02 17:39:32 +00:00