fschneider@google.com
df94b27666
VM: Align implementations of assembler constant pools.
...
Add Support for adding patchable/non-patchable entries on ARM/MIPS like
already done for x64/ARM64.
R=vegorov@google.com
Review URL: https://codereview.chromium.org//886173003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@43589 260f80e4-7a28-3924-810f-c04153c831b5
2015-02-09 11:47:36 +00:00
fschneider@google.com
1e7310d48f
Improve constant pool implementation in the assembler.
...
Instead of using RawObject* as keys, use Object*. Using handles eliminates any assumption
about the underlying GC implementation (e.g. requiring that old objects don't move).
Remove special handling of null_object by making HashMap more generic and
allowing the trait to specify the value used to indicate an empty element.
The goal is to use one unified, efficient implementation of the constant
pool on all architectures that require one (x64, arm64, mips).
R=vegorov@google.com , zra@google.com
Review URL: https://codereview.chromium.org//848703002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42901 260f80e4-7a28-3924-810f-c04153c831b5
2015-01-15 10:43:36 +00:00
vegorov@google.com
cafe4db7de
Tweak CanLoadFromObjectPool to return true even if obj.InVMHeap().
...
Previously it made sense to return false from this predicate because we would then load it directly as immediate.
However after r28067 we switched from movq to LoadImmediate. Now we end up putting obj.raw() into a constant pool with lowest bit masked off (to make it look like a smi) and then restoring this bit after load:
movq r10, [r15 + offs]
orq r10, 1
This orq is completely redundant - we should not clear off the least significant bit in the first place.
BUG=
R=zra@google.com
Review URL: https://codereview.chromium.org//849093002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42877 260f80e4-7a28-3924-810f-c04153c831b5
2015-01-14 17:57:27 +00:00
vegorov@google.com
0e1479d2cb
Merge RawICData::range_feedback_ field into RawICData::state_bits_.
...
We were using a lot of bits in state_bits for recording deoptimization reasons, never asked about presence of those bits.
Ultimately optimizer cares only about 3 different deopts, so most all of those bits were wasted.
R=srdjan@google.com , zra@google.com
BUG=
Review URL: https://codereview.chromium.org//807593002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42388 260f80e4-7a28-3924-810f-c04153c831b5
2014-12-16 13:12:35 +00:00
vegorov@google.com
aa48bd4759
Range feedback for arithmetic operations.
...
In addition to tracking input and output ranges in the IC-stubs with a Smi fastpath (SmiAdd and SmiSub, currently) this CL also introduces two IC stubs that have no fast-path by still track ranges and update the range feedback.
We are able to distinguish between the following ranges (encoding of the lattice is shown in the parens):
- u-smi (0000)
- smi (0001)
- uint31 (0010)
- int32 (0011)
- uint32 (0100)
- int64 (1xxx) and (x1x1)
BUG=
R=fschneider@google.com , srdjan@google.com , zra@google.com
Review URL: https://codereview.chromium.org//735543003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42370 260f80e4-7a28-3924-810f-c04153c831b5
2014-12-15 18:48:15 +00:00
regis@google.com
0fb9f43f32
Complete and clean up breakpoint support in all 3 debuggers embedded in MIPS,
...
ARM, and ARM64 simulators.
Implement the same debugging commands in all 3 simulators: stop_sim_at flag, bt,
p icount, break, del, unstop, etc...
R=zra@google.com
Review URL: https://codereview.chromium.org//789903002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@42216 260f80e4-7a28-3924-810f-c04153c831b5
2014-12-09 19:26:26 +00:00
fschneider@google.com
1dc4e979d9
Remove isolate pointer from context objects.
...
By moving all stubs that do runtime calls into the isolate
we don't need to cache the current isolate in each context
object.
This saves space on each context at the cost of duplicating stubs
in each isolate. Most stubs are already isolate-specific and the total number
of stubs is small enough for this to be a good trade-off.
R=vegorov@google.com
Review URL: https://codereview.chromium.org//668193002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@41279 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-24 12:19:20 +00:00
zra@google.com
677a4709ce
Uses stp/ldp for frame entry/exit on arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//640423002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@41041 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-10 15:29:27 +00:00
zra@google.com
240afa6afa
Expands the use of Immediate and Operand wrappers.
...
Since Register is an enum type, it is automatically
coerced to integer types when passed as a parameter to
functions expecting an integer argument. This change
expands the use of Immediate and Operand wrappers
for Assembler instructions and macros to avoid this
automatic coercion.
I've also added dummy constructors to Address and
FieldAddress classes to address the same problem,
but in a way that does not increase verbosity,
since Address and FieldAddress are much more
prevalent in the code.
A cleaner solution would involve making Register
no longer coercable to integer types, but this
would likely require many changes to the Assemblers.
R=regis@google.com
Review URL: https://codereview.chromium.org//593363003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40905 260f80e4-7a28-3924-810f-c04153c831b5
2014-10-03 19:46:24 +00:00
fschneider@google.com
855541d88e
Make subtype test stubs isolate-specific.
...
This avoids loading the current isolate from the context
register and makes those stubs not depend on having the context
stored in the CTX register.
R=vegorov@google.com
Review URL: https://codereview.chromium.org//605533003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40714 260f80e4-7a28-3924-810f-c04153c831b5
2014-09-26 16:06:30 +00:00
iposva@google.com
cc13627fc8
- Remove Isolate::CurrentAddress().
...
- Remove use of INFINITY and -INFINITY.
R=rmacnak@google.com , srdjan@google.com
Review URL: https://codereview.chromium.org//609593002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40700 260f80e4-7a28-3924-810f-c04153c831b5
2014-09-25 23:39:30 +00:00
koda@google.com
667454a233
Support old-space allocation in generated code (bump block only for now).
...
First steps towards general pretenuring support.
* Generalize Heap::Top/EndAddress.
* Add testing flag to exercise new code paths.
* Also update the slow-case runtime calls, to ensure a fresh block will be allocated in old.
Next steps are general invalidation of the generated code and adding a policy that doesn't blow up the store buffers), and freelist allocation.
Review URL: https://codereview.chromium.org//578443003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40530 260f80e4-7a28-3924-810f-c04153c831b5
2014-09-19 23:46:22 +00:00
fschneider@google.com
da0fb6bbe2
More intrinsics in IR.
...
R=srdjan@google.com , vegorov@google.com , zra@google.com
Review URL: https://codereview.chromium.org//513213002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40088 260f80e4-7a28-3924-810f-c04153c831b5
2014-09-10 13:34:58 +00:00
fschneider@google.com
36c848d1d7
VM: Optimized context allocation on all platforms.
...
This change generate inline code for context allocation and makes
the stores to initialize the parent pointer and the context variables
explicit in the optimized flow graph. This allows dead store elimination
to eliminate those stores.
Before, we only had inlined context allocation for ia32.
Furthermore:
* Added an assertion that the exit label of slow-path code
is bound when emitting deferred code. This used to cause random crashes
if forgotten.
* Fixed a bug in allocation stats on ARM.
BUG=dartbug.com/17238
R=srdjan@google.com
Review URL: https://codereview.chromium.org//346823003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@39202 260f80e4-7a28-3924-810f-c04153c831b5
2014-08-13 15:49:01 +00:00
vegorov@google.com
36cddbd749
Use shorter TryAllocate instruction sequence on ARM/ARM64/MIPS.
...
On these architectures it's preferable to load Scavenger address into the register and then access top/end fields through this register instead of loading addresses of those fields as immediates --- which takes either two instructions or a memory load through a pool pointer.
Cleanup boxing slow-paths in the optimizing compiler. We had tons of duplicated code that was essentially doing the same thing.
BUG=
R=johnmccutchan@google.com , regis@google.com
Review URL: https://codereview.chromium.org//410333003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38539 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-24 12:04:21 +00:00
zra@google.com
b73310c2c2
Adds intrinsics for Float64Array [] and []=.
...
Improves performance in unoptimized code.
R=regis@google.com , srdjan@google.com
Review URL: https://codereview.chromium.org//408373002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38483 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-22 23:16:07 +00:00
zra@google.com
fbbc91ff69
Cleanup of class id loading sequences.
...
These ended up looking performance neutral, but
the cleanup is probably good.
R=srdjan@google.com , vegorov@google.com
Review URL: https://codereview.chromium.org//392343002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38333 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-17 16:20:11 +00:00
rmacnak@google.com
fbe77f8ab4
Specialize breakpoint stubs by set of live registers of the stubs they are intercepting.
...
Trades space in the constant pool for space at call sites.
R=fschneider@google.com
Review URL: https://codereview.chromium.org//339183010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38205 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-14 19:38:11 +00:00
zra@google.com
3560708738
Removes branches from LoadTaggedClassIdMayBeSmi.
...
Since this assembler macro is used in the CheckInlineCache stub,
this change improves unoptimized code performance.
R=srdjan@google.com
Review URL: https://codereview.chromium.org//383443002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38096 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-09 18:31:21 +00:00
asiva@google.com
f85f986bda
Make isolate specific stub code accessors instance methods instead
...
of static. This allows use of isolate without having to call
Isolate::Current() when using these accessors.
R=johnmccutchan@google.com , srdjan@google.com , zra@google.com
Review URL: https://codereview.chromium.org//365983002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38040 260f80e4-7a28-3924-810f-c04153c831b5
2014-07-07 21:25:00 +00:00
srdjan@google.com
e35ecf13e3
Add LoadTaggedClassIdMayBeSmi to assembly and improve performance of inline cache stubs.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//313083008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@37011 260f80e4-7a28-3924-810f-c04153c831b5
2014-06-04 20:37:21 +00:00
zra@google.com
436a06a381
Fixes to run "Hello, world!" on arm64 hardware.
...
Primarily, in Dart code, instead of using R31 as our
stack pointer, on entry we copy it into a second
register (R18) and use that as our stack pointer after
moving R31 to the Dart stack limit. On calling back
into C++ from Dart code, R31 is restored, and R18 is
cached in the callee-saved register R26.
R=regis@google.com
Review URL: https://codereview.chromium.org//311903004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36930 260f80e4-7a28-3924-810f-c04153c831b5
2014-06-03 18:38:28 +00:00
zra@google.com
6143dd9bad
Adds more ARM64 SIMD instructions.
...
Also, enables simd inlining for arm64.
R=regis@google.com
Review URL: https://codereview.chromium.org//307523002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36694 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-27 16:29:15 +00:00
fschneider@google.com
01255e0843
Change COMPILE_ASSERT to take only one argument and use it in more places.
...
This way it can be used in the same way as ASSERT.
R=iposva@google.com
Review URL: https://codereview.chromium.org//298963006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36625 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-26 09:45:04 +00:00
zra@google.com
35d53f5a45
Beings adding SIMD support to arm64.
...
It's still disabled for now, while I continue working.
Also, I tried to use const a bit more consistently in
the arm and arm64 IL.
R=regis@google.com
Review URL: https://codereview.chromium.org//293993013
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36465 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-22 00:17:33 +00:00
regis@google.com
989aa3348a
Fix an undetected Smi overflow on ARM.
...
Fix wrongly triggered overflow in optimized code on Intel.
Add a test.
Address a few TODOs.
R=zra@google.com
Review URL: https://codereview.chromium.org//281823002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36186 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-14 19:57:04 +00:00
zra@google.com
eb11b8a7a0
Adds far-branches to arm64.
...
Also fixes bugs and enables tests.
R=regis@google.com
Review URL: https://codereview.chromium.org//283513002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36051 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-12 18:43:08 +00:00
zra@google.com
ea99b1e6f8
Adds debugger patching to arm64.
...
Also other small fixes.
R=regis@google.com
Review URL: https://codereview.chromium.org//274043003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36003 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-09 23:20:14 +00:00
zra@google.com
5d94e8900f
Adds single-precision and SIMD load/store to arm64.
...
Also adds conversion between double an single-precision floats.
R=regis@google.com
Review URL: https://codereview.chromium.org//269343010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35933 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-08 19:06:04 +00:00
zra@google.com
65946f752c
Adds arm64 double arithmetic instructions.
...
Also adds:
- double comparison instructions,
- conditional increment instruction,
- double <-> int conversion instructions,
- IL instructions that use these,
- NoSuchMethod call stub,
- and bug fixes.
R=regis@google.com
Review URL: https://codereview.chromium.org//262333007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35830 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-06 20:50:44 +00:00
zra@google.com
037a72e059
Enables many language tests for arm64.
...
- Adds msub and smulh instructions for implementing
BinarySmiOp.
- Adds fmovdd to move doubles between V registers.
- Implements many stubs and IL instructions. These are
ported from ARM with small fix-ups. Deopt code comes
from x64 because the stack frame layout is the same.
R=regis@google.com
Review URL: https://codereview.chromium.org//263243002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35753 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-05 18:09:08 +00:00
zra@google.com
b3425abdf2
Uses double load/store on arm64, enables tests.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//262793006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35705 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-02 20:16:22 +00:00
zra@google.com
5be8150a3a
Begins work on arm64 floating point instructions.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//261783005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35661 260f80e4-7a28-3924-810f-c04153c831b5
2014-05-01 21:50:17 +00:00
regis@google.com
8868058d60
Enums cleanup.
...
R=iposva@google.com
Review URL: https://codereview.chromium.org//259393002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35559 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-30 01:26:14 +00:00
zra@google.com
8796a5c32e
More stubs and instructions for arm64.
...
Also, more tests enabled.
R=regis@google.com
Review URL: https://codereview.chromium.org//254673007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35554 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-29 23:18:37 +00:00
zra@google.com
164e4bc38b
Removes loads from PP from stubs on arm64.
...
Also fixes a bug in loads and stores.
R=regis@google.com
Review URL: https://codereview.chromium.org//251083007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35537 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-29 19:08:06 +00:00
zra@google.com
a4b84a722a
Ensures that stubs added to each object pool on x64
...
are generated before they are used by reordering the
list of stubs.
R=iposva@google.com
Review URL: https://codereview.chromium.org//258133002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35524 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-29 14:48:00 +00:00
zra@google.com
3274258b4d
Enables all codegen tests for arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//259903002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35448 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-25 21:28:48 +00:00
zra@google.com
2dee7e5a6d
Enables all startup code for arm64.
...
Also, enables a few more codegen tests, and adds
a conditional move instruction.
R=regis@google.com
Review URL: https://codereview.chromium.org//253623003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35440 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-25 18:54:46 +00:00
zra@google.com
9fc211af50
Enables simple static call test on arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//255633002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35380 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-24 16:29:11 +00:00
zra@google.com
0995122da8
Enables first codegen test on arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//246293010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35317 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-23 17:50:43 +00:00
zra@google.com
f94ea20502
Adds StoreIntoObject for arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//247023004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35277 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-22 19:44:11 +00:00
zra@google.com
76dfb827cb
Adds load/store from signed, unscaled, 9-bit offset w/ no writeback to arm64.
...
I missed this before because it was in the docs under the assembler mnemonic ldur.
R=regis@google.com
Review URL: https://codereview.chromium.org//242983006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35222 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-21 20:30:27 +00:00
zra@google.com
fde6c7a829
Adds Runtime call stub and Dart entry stub to ARM64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//243773002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35190 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-18 23:43:15 +00:00
zra@google.com
57abf60fc8
Code patching for ARM64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//241573002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35156 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-17 22:00:11 +00:00
zra@google.com
25d93a82e2
Adds simulator debugger and Stop to arm64.
...
Also replaces UNIMPLEMENTED in stubs with Stop so
we can enable generation.
R=regis@google.com
Review URL: https://codereview.chromium.org//240283005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35127 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-16 19:57:52 +00:00
zra@google.com
d128fb91ae
Adds object pool, LoadImmediate, and LoadObject to ARM64.
...
Also enables many object tests.
R=regis@google.com
Review URL: https://codereview.chromium.org//239303008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@35109 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-16 15:48:33 +00:00
zra@google.com
3a21a88e52
Adds comparisons, labels, branches.
...
Also adds compare-and-branch, test-and-branch, and
unconditional branch with 26-bit offset instrucitons
to the disassembler and simulator, but not to the
assembler, yet, since they'll require a bit more
work and this CL is getting big.
R=regis@google.com
Review URL: https://codereview.chromium.org//235363005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34993 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-11 20:40:11 +00:00
zra@google.com
11434b57aa
Adds logical operations to arm64.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//231373003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34901 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-09 22:14:47 +00:00
zra@google.com
2fe51715e5
Begins work on ARM64, first assembler test.
...
Most new code is in constants_arm64.h and
{assembler,disassembler,simulator}_arm64.{h,cc}
The rest of the CL just #def's out tests, modifies status files,
and adds UNIMPLEMENTED functions, etc.
R=regis@google.com
Review URL: https://codereview.chromium.org//221133002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@34654 260f80e4-7a28-3924-810f-c04153c831b5
2014-04-02 17:39:32 +00:00