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24 Commits

Author SHA1 Message Date
zra@google.com dad3270d95 Implements far branch targets for MIPS. 
This change adds a flag --mips-far-branches, which when set causes
relative branches to be converted to absolute branches by determining
the PC, adding the branch offset to it, and using the jr or jalr
instruction to jump if the branch test passes.

This procedure clobbers the assembler temporary TMP, so TMP can no
longer be used in a branch test or in the branch delay slot of a
relative branch. Because TMP can't be used in a branch test, a
new temporary is introduced CMPRES2. This change replaces TMP with
CMPRES1 or another register where TMP can no longer be used.

Tests that were failing due to a too-far relative have the
--mips-far-branches flag set.

R=regis@google.com

Review URL: https://codereview.chromium.org//20369003

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25543 260f80e4-7a28-3924-810f-c04153c831b5
 2013-07-26 23:30:32 +00:00
zra@google.com 8edda78ccc Enables more tests for SIMMIPS. 
. Fixes register allocation bugs
. Implements float <-> double conversion in assembler and simulator.
. Fixes floating point argument passing for simarm and simmips,
  and floating point return for simarm, and adjusts tests to match.

R=regis@google.com

Review URL: https://codereview.chromium.org//17502002

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24365 260f80e4-7a28-3924-810f-c04153c831b5
 2013-06-24 20:16:16 +00:00
zra@google.com 488b20bd7e Fixes buggy FPU tests for MIPS hardware. 
R=regis@google.com

Review URL: https://codereview.chromium.org//15874005

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24152 260f80e4-7a28-3924-810f-c04153c831b5
 2013-06-18 16:47:43 +00:00
zra@google.com e846af4128 Implements intrinsics for MIPS. 
Also, adds the MADD, MADDU, MTLO, MTHI instructions
to the MIPS simulator, assembler, and disassembler.

R=regis@google.com

Review URL: https://codereview.chromium.org//16272004

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23489 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-31 21:03:41 +00:00
zra@google.com 354b204cf0 Enables optimization on MIPS 
- Exposes double precision rather than single precision floating point registers
  to architecture generic code. This entails a mechanical change in the assembler
  to floating point instructions.
- Adds slti, sltiu instructions for comparison with small immediates, and uses
  them in the Branch(Un)Signed* macros.
- Fixes a bug in the intermediate language comparison/branching instructions
  caused by using subu for comparison. Now it uses two slt instructions.
- Fixes register use bugs in intermediate language.
- More uses of NULLREG instead of loading Object::null()

R=regis@google.com

Review URL: https://codereview.chromium.org//16022011

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23190 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-24 23:45:41 +00:00
zra@google.com b350781cad Impelemnts some FPU arithmetic function for the MIPS simulator, assembler, disassembler. 
R=regis@google.com

Review URL: https://codereview.chromium.org//15038008

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22818 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-16 21:18:04 +00:00
zra@google.com 18268541b0 Implements int to double conversion instructions for MIPS simulator, assembler, disassembler. 
R=regis@google.com

Review URL: https://codereview.chromium.org//15144004

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22763 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-15 23:51:17 +00:00
zra@google.com 144def4ee3 Implements FPU compare and branching for MIPS simulator, assembler, disassembler. 
R=regis@google.com

Review URL: https://codereview.chromium.org//14672037

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22752 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-15 18:37:47 +00:00
zra@google.com 3c10f6b796 On MIPS, keeps Object::null() in a register. 
On MIPS, we have a lot of registers, and we don't use very many of them.
This change removes the second temporary register TMP2, and instead
dedicates a register to holding Object::null(), which is used frequently
for comparisons, etc..

Also, uses branch delay slot when leaving a dart frame and returning.

R=regis@google.com

Review URL: https://codereview.chromium.org//14854010

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22331 260f80e4-7a28-3924-810f-c04153c831b5
 2013-05-02 17:53:34 +00:00
zra@google.com 64d10ad4e4 Implements write barrier on MIPS. 
Review URL: https://codereview.chromium.org//13925024

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21532 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-16 00:25:03 +00:00
zra@google.com e8f86c5d3a Adds support for UseDartApi vm test on MIPS. 
Also, adds:
- xori instruction,
- SubuDetectOverflow (like AdduDetectOverflow).
Review URL: https://codereview.chromium.org//13884017

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21396 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-12 22:20:32 +00:00
zra@google.com 1349cb1fea Adds some floating point instructions to MIPS simulator, assembler, disassembler. 
Review URL: https://codereview.chromium.org//14206002

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21376 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-12 17:25:38 +00:00
zra@google.com cae56d75ed Introduces a second temporary register for MIPS assembler macros. 
- Also, adds macros for comparisons followed by branches, and uses them.
Review URL: https://codereview.chromium.org//13483018

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21118 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-08 22:04:27 +00:00
zra@google.com d5be052e40 Adds macros to the MIPS assembler for detecting overflow. 
Review URL: https://codereview.chromium.org//13722022

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21085 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-08 16:51:12 +00:00
zra@google.com fd72ee418a Implements optional parameter handling in MIPS vm. 
- Deocdes ic data and argument descriptor.
- Removes SUB instruction from assembler and disassembler.
Review URL: https://codereview.chromium.org//13474009

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20895 260f80e4-7a28-3924-810f-c04153c831b5
 2013-04-03 21:43:52 +00:00
zra@google.com 007c830756 Adds branch instructions and labels to the MIPS simulator, assembler, disassembler. 
Review URL: https://codereview.chromium.org//12634030

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20419 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-22 21:37:10 +00:00
zra@google.com 2bdc772122 Adds MIPS SPECIAL instructions to simulator, assembler, debugger. 
Review URL: https://codereview.chromium.org//12837009

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20321 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-21 15:50:31 +00:00
zra@google.com ad8004569d Adds MIPS instructions to simulator, assembler, disassembler 
ins - bitfield insert
ext - bitfield extract
l{b,bu,h,hu,w} - load byte, unsigned byte, etc.
s{b,h,w} - store byte, halfword, word
Review URL: https://codereview.chromium.org//12519007

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19819 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-11 20:50:50 +00:00
zra@google.com 6699610946 Adds a few MIPS arithmetic instructions to the simulator, assembler, disassembler 
Review URL: https://codereview.chromium.org//12545024

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19730 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-08 21:47:03 +00:00
iposva@google.com 0308a45996 - Allow the use of branch delay slots. 
Review URL: https://codereview.chromium.org//12623002

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19669 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-08 07:25:19 +00:00
iposva@google.com f507e542de - Add a skeleton MIPS assembler, disassembler and simulator. 
- Remove unused fields and methods from ARM simulator.
- Remove unused 5th parameter from Simulator::Call.
Review URL: https://codereview.chromium.org//12541003

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19606 260f80e4-7a28-3924-810f-c04153c831b5
 2013-03-07 11:04:27 +00:00
regis@google.com 8c44be4313 Add support for object pool that will be used on ARM and MIPS architectures. 
Modify code patching infrastructure to accept code object, which is necessary to
get to the object pool containing patchable target addresses.
Modify assembler test infrastructure to provide associated code object.
Review URL: https://codereview.chromium.org//12260026

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@18604 260f80e4-7a28-3924-810f-c04153c831b5
 2013-02-15 23:55:31 +00:00
regis@google.com 5675b85979 Generate first ARM assembler test and execute (simulate) it. 
RFC: First draft showing how generated ARM code accesses GC'ed objects and
accesses patched call targets.
Review URL: https://codereview.chromium.org//12224024

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@18200 260f80e4-7a28-3924-810f-c04153c831b5
 2013-02-07 00:55:47 +00:00
regis@google.com 0bf36986ec Add test skeletons for arm and mips. 
Review URL: https://codereview.chromium.org//11929037

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@17330 260f80e4-7a28-3924-810f-c04153c831b5
 2013-01-18 23:46:48 +00:00