Kato Gangstad
133 lines
3.5 KiB
Markdown
133 lines
3.5 KiB
Markdown
# ESP32 Port
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Date: 2026-04-04
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Author: Kato Gangstad
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This folder contains the ESP32 BACnet port built with PlatformIO.
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It targets multiple ESP32-family boards and covers BACnet MS/TP, BACnet/IP, and BACnet Gateway (based on apps/gateway2) profiles.
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It is based on the current lwIP port and Pico port patterns in this repository.
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## Current Scope
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- BACnet MS/TP transport for ESP32 boards with RS485
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- BACnet/IP transport for compact WiFi and Ethernet ESP32 targets
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- BACnet routing between BACnet/IP and BACnet MS/TP
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## Port Identity
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It is the ESP32 BACnet port for the current PlatformIO-based targets in this repository.
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## Supported Board Profiles
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The current board coverage includes:
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- Seeed Studio XIAO ESP32C3 for ultra-compact BACnet/IP
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- M5StamPLC for BACnet MS/TP and BACnet router builds
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- Olimex ESP32-POE for BACnet/IP
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The upstream BACnet stack has a broad source set and multiple app profiles.
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This port selects the ESP32-specific transport, board, and application wiring needed for the environments documented below.
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## Files
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- src/main.cpp: Application loop, BACnet object table, and PLC I/O sync
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- src/mstimer_init.c: millisecond timer hook used by mstimer
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- src/rs485.c: ESP32 RS485 low-level driver for MS/TP
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- src/dlenv.c: MS/TP datalink environment setup and port wiring
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- src/bip_socket.cpp: BACnet/IP UDP socket bridge for WiFi and Ethernet targets
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- extra_script.py: Injects BACnet core/basic sources into the PlatformIO build
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## Build Notes
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1. Open this folder as a PlatformIO project root, or run PlatformIO with this folder as cwd.
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2. Start with the environment that matches your board and transport profile.
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3. The `platformio.ini` file defines all tested board environments for this port.
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4. Ensure PlatformIO CLI is available in your shell (`pio --version`).
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5. Build with `pio run -e <environment-name>`.
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## Tested Environments
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The following PlatformIO environments have been built and uploaded successfully:
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- `xiao-esp32c3-wifi-bip` on Seeed Studio XIAO ESP32C3
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- `m5stamplc-mstp` on M5StamPLC
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- `m5stamplc-gateway-bip-mstp` on M5StamPLC
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- `esp32-poe-wifi-bip` on Olimex ESP32-POE
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## Validation Tools
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Interoperability and functional verification have been tested with:
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- YABE
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- Honeywell Eaglehawk 4.15
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- Tridium Niagara 4.15
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## Board Pictures
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The following board photos document the hardware used for the tested environments.
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### Seeed Studio XIAO ESP32C3
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Used for:
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- `xiao-esp32c3-wifi-bip`
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Why this board stands out:
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- Extremely compact form factor for a BACnet/IP target
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- Physical size: 21 x 17.8 mm
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- Strong candidate for one of the smallest BACnet/IP device ever !
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Hardware summary:
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- MCU: ESP32-C3
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- CPU type: 32-bit single-core RISC-V
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- CPU clock: 160 MHz
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- RAM: 320 KB
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- Flash: 4 MB
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### M5StamPLC
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- BACnet server object model with Device + Binary Input + Binary Output objects
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- Runtime mapping:
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- BI 0..7 <- PLC inputs 1..8
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- BO 0..3 -> PLC relays 1..4
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- RS485 pin mapping aligned with the M5StamPLC hardware profile:
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- TX: GPIO0
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- RX: GPIO39
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- DIR: GPIO46
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Used for:
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- `m5stamplc-mstp`
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- `m5stamplc-bip`
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- `m5stamplc-gateway-bip-mstp`
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- soon to come `m5stamplc-poe-bip`
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Hardware summary:
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- MCU: ESP32-S3
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- CPU clock: 240 MHz
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- RAM: 320 KB
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- Flash: 8 MB
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### Olimex ESP32-POE
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Used for:
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- `esp32-poe-wifi-bip`
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- `esp32-poe-eth-bip`
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Hardware summary:
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- MCU: ESP32
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- CPU clock: 240 MHz
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- RAM: 320 KB
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- Flash: 4 MB
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