Steve Karg
4781582204
* Changed ATmega168 example for ATmega328 on Arduino Uno R3 with DFR0259 RS485 shield. Added ADC interface from BDK port and mapped to some AV objects. Removed MS/TP MAC address DIP switch GPIO and moved MS/TP configuration to AV objects. Added AV units property. Added some Uno R3 Digital Inputs and outputs mapped to some BV. Added AVR EEPROM from BDK port and mapped some non-volatile data including MAC address and max manager and baud rate, device ID and names and description and location.
290 lines
7.3 KiB
C
290 lines
7.3 KiB
C
/**
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* @brief This module manages the common IAR and GCC compiler differences
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* @author Steve Karg <skarg@users.sourceforge.net>
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* @date 2007
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* @copyright SPDX-License-Identifier: MIT
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*/
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#ifndef IAR2GCC_H
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#define IAR2GCC_H
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#if !defined(F_CPU)
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#error You must define F_CPU - clock frequency!
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#endif
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/* IAR */
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#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
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#include <inavr.h>
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#include <ioavr.h>
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#include <intrinsics.h>
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#include <stdint.h>
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/* BitValue is used alot in GCC examples */
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#ifndef _BV
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#define _BV(bit_num) (1 << (bit_num))
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#endif
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/* inline function */
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static inline void _delay_us(uint8_t microseconds)
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{
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do {
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__delay_cycles(F_CPU / 1000000UL);
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} while (microseconds--);
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}
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#if (__VER__ > 700)
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#define DDA0 DDRA0
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#define DDA1 DDRA1
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#define DDA2 DDRA2
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#define DDA3 DDRA3
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#define DDA4 DDRA4
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#define DDA5 DDRA5
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#define DDA6 DDRA6
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#define DDA7 DDRA7
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#define DDB0 DDRB0
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#define DDB1 DDRB1
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#define DDB2 DDRB2
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#define DDB3 DDRB3
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#define DDB4 DDRB4
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#define DDB5 DDRB5
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#define DDB6 DDRB6
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#define DDB7 DDRB7
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#define DDC0 DDRC0
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#define DDC1 DDRC1
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#define DDC2 DDRC2
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#define DDC3 DDRC3
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#define DDC4 DDRC4
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#define DDC5 DDRC5
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#define DDC6 DDRC6
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#define DDC7 DDRC7
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#define DDD0 DDRD0
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#define DDD1 DDRD1
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#define DDD2 DDRD2
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#define DDD3 DDRD3
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#define DDD4 DDRD4
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#define DDD5 DDRD5
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#define DDD6 DDRD6
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#define DDD7 DDRD7
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#endif
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#endif
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#if defined(__GNUC__)
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#include <util/delay.h>
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#endif
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/* adjust some definitions to common versions */
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#if defined(__CROSSWORKS_AVR)
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#if (__TARGET_PROCESSOR == ATmega644P)
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#define PRR PRR0
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#define UBRR0 UBRR0W
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#define UBRR1 UBRR1W
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#define PA0 PORTA0
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#define PA1 PORTA1
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#define PA2 PORTA2
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#define PA3 PORTA3
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#define PA4 PORTA4
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#define PA5 PORTA5
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#define PA6 PORTA6
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#define PA7 PORTA7
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#define PB0 PORTB0
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#define PB1 PORTB1
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#define PB2 PORTB2
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#define PB3 PORTB3
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#define PB4 PORTB4
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#define PB5 PORTB5
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#define PB6 PORTB6
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#define PB7 PORTB7
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#define PC0 PORTC0
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#define PC1 PORTC1
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#define PC2 PORTC2
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#define PC3 PORTC3
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#define PC4 PORTC4
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#define PC5 PORTC5
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#define PC6 PORTC6
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#define PC7 PORTC7
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#define PD0 PORTD0
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#define PD1 PORTD1
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#define PD2 PORTD2
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#define PD3 PORTD3
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#define PD4 PORTD4
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#define PD5 PORTD5
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#define PD6 PORTD6
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#define PD7 PORTD7
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#endif
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#endif
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/* Input/Output Registers */
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#if defined(__GNUC__)
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#include <avr/io.h>
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typedef struct {
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unsigned char bit0 : 1;
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unsigned char bit1 : 1;
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unsigned char bit2 : 1;
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unsigned char bit3 : 1;
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unsigned char bit4 : 1;
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unsigned char bit5 : 1;
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unsigned char bit6 : 1;
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unsigned char bit7 : 1;
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} BitRegisterType;
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#ifndef true
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#define true 1
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#endif
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#ifndef false
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#define false 0
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#endif
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#define GPIO_BITREG(port, bitnum) \
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((volatile BitRegisterType *)_SFR_MEM_ADDR(port))->bit##bitnum
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#define PINA_Bit0 GPIO_BITREG(PINA, 0)
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#define PINA_Bit1 GPIO_BITREG(PINA, 1)
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#define PINA_Bit2 GPIO_BITREG(PINA, 2)
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#define PINA_Bit3 GPIO_BITREG(PINA, 3)
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#define PINA_Bit4 GPIO_BITREG(PINA, 4)
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#define PINA_Bit5 GPIO_BITREG(PINA, 5)
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#define PINA_Bit6 GPIO_BITREG(PINA, 6)
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#define PINA_Bit7 GPIO_BITREG(PINA, 7)
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#define PORTA_Bit0 GPIO_BITREG(PORTA, 0)
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#define PORTA_Bit1 GPIO_BITREG(PORTA, 1)
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#define PORTA_Bit2 GPIO_BITREG(PORTA, 2)
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#define PORTA_Bit3 GPIO_BITREG(PORTA, 3)
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#define PORTA_Bit4 GPIO_BITREG(PORTA, 4)
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#define PORTA_Bit5 GPIO_BITREG(PORTA, 5)
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#define PORTA_Bit6 GPIO_BITREG(PORTA, 6)
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#define PORTA_Bit7 GPIO_BITREG(PORTA, 7)
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#define PINB_Bit0 GPIO_BITREG(PINB, 0)
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#define PINB_Bit1 GPIO_BITREG(PINB, 1)
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#define PINB_Bit2 GPIO_BITREG(PINB, 2)
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#define PINB_Bit3 GPIO_BITREG(PINB, 3)
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#define PINB_Bit4 GPIO_BITREG(PINB, 4)
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#define PINB_Bit5 GPIO_BITREG(PINB, 5)
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#define PINB_Bit6 GPIO_BITREG(PINB, 6)
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#define PINB_Bit7 GPIO_BITREG(PINB, 7)
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#define PORTB_Bit0 GPIO_BITREG(PORTB, 0)
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#define PORTB_Bit1 GPIO_BITREG(PORTB, 1)
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#define PORTB_Bit2 GPIO_BITREG(PORTB, 2)
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#define PORTB_Bit3 GPIO_BITREG(PORTB, 3)
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#define PORTB_Bit4 GPIO_BITREG(PORTB, 4)
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#define PORTB_Bit5 GPIO_BITREG(PORTB, 5)
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#define PORTB_Bit6 GPIO_BITREG(PORTB, 6)
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#define PORTB_Bit7 GPIO_BITREG(PORTB, 7)
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#define PINC_Bit0 GPIO_BITREG(PINC, 0)
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#define PINC_Bit1 GPIO_BITREG(PINC, 1)
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#define PINC_Bit2 GPIO_BITREG(PINC, 2)
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#define PINC_Bit3 GPIO_BITREG(PINC, 3)
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#define PINC_Bit4 GPIO_BITREG(PINC, 4)
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#define PINC_Bit5 GPIO_BITREG(PINC, 5)
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#define PINC_Bit6 GPIO_BITREG(PINC, 6)
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#define PINC_Bit7 GPIO_BITREG(PINC, 7)
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#define PORTC_Bit0 GPIO_BITREG(PORTC, 0)
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#define PORTC_Bit1 GPIO_BITREG(PORTC, 1)
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#define PORTC_Bit2 GPIO_BITREG(PORTC, 2)
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#define PORTC_Bit3 GPIO_BITREG(PORTC, 3)
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#define PORTC_Bit4 GPIO_BITREG(PORTC, 4)
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#define PORTC_Bit5 GPIO_BITREG(PORTC, 5)
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#define PORTC_Bit6 GPIO_BITREG(PORTC, 6)
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#define PORTC_Bit7 GPIO_BITREG(PORTC, 7)
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#define PIND_Bit0 GPIO_BITREG(PIND, 0)
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#define PIND_Bit1 GPIO_BITREG(PIND, 1)
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#define PIND_Bit2 GPIO_BITREG(PIND, 2)
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#define PIND_Bit3 GPIO_BITREG(PIND, 3)
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#define PIND_Bit4 GPIO_BITREG(PIND, 4)
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#define PIND_Bit5 GPIO_BITREG(PIND, 5)
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#define PIND_Bit6 GPIO_BITREG(PIND, 6)
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#define PIND_Bit7 GPIO_BITREG(PIND, 7)
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#define PORTD_Bit0 GPIO_BITREG(PORTD, 0)
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#define PORTD_Bit1 GPIO_BITREG(PORTD, 1)
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#define PORTD_Bit2 GPIO_BITREG(PORTD, 2)
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#define PORTD_Bit3 GPIO_BITREG(PORTD, 3)
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#define PORTD_Bit4 GPIO_BITREG(PORTD, 4)
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#define PORTD_Bit5 GPIO_BITREG(PORTD, 5)
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#define PORTD_Bit6 GPIO_BITREG(PORTD, 6)
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#define PORTD_Bit7 GPIO_BITREG(PORTD, 7)
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#define GPIOR0_Bit0 GPIO_BITREG(GPIOR0, 0)
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#define GPIOR0_Bit1 GPIO_BITREG(GPIOR0, 1)
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#define GPIOR0_Bit2 GPIO_BITREG(GPIOR0, 2)
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#define GPIOR0_Bit3 GPIO_BITREG(GPIOR0, 3)
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#define GPIOR0_Bit4 GPIO_BITREG(GPIOR0, 4)
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#define GPIOR0_Bit5 GPIO_BITREG(GPIOR0, 5)
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#define GPIOR0_Bit6 GPIO_BITREG(GPIOR0, 6)
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#define GPIOR0_Bit7 GPIO_BITREG(GPIOR0, 7)
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#define GPIOR1_Bit0 GPIO_BITREG(GPIOR1, 0)
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#define GPIOR1_Bit1 GPIO_BITREG(GPIOR1, 1)
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#define GPIOR1_Bit2 GPIO_BITREG(GPIOR1, 2)
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#define GPIOR1_Bit3 GPIO_BITREG(GPIOR1, 3)
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#define GPIOR1_Bit4 GPIO_BITREG(GPIOR1, 4)
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#define GPIOR1_Bit5 GPIO_BITREG(GPIOR1, 5)
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#define GPIOR1_Bit6 GPIO_BITREG(GPIOR1, 6)
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#define GPIOR1_Bit7 GPIO_BITREG(GPIOR1, 7)
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#define GPIOR2_Bit0 GPIO_BITREG(GPIOR2, 0)
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#define GPIOR2_Bit1 GPIO_BITREG(GPIOR2, 1)
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#define GPIOR2_Bit2 GPIO_BITREG(GPIOR2, 2)
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#define GPIOR2_Bit3 GPIO_BITREG(GPIOR2, 3)
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#define GPIOR2_Bit4 GPIO_BITREG(GPIOR2, 4)
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#define GPIOR2_Bit5 GPIO_BITREG(GPIOR2, 5)
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#define GPIOR2_Bit6 GPIO_BITREG(GPIOR2, 6)
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#define GPIOR2_Bit7 GPIO_BITREG(GPIOR2, 7)
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#endif
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/* Global Interrupts */
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#if defined(__GNUC__)
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#define __enable_interrupt() sei()
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#define __disable_interrupt() cli()
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#endif
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/* Interrupts */
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#if defined(__ICCAVR__)
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#define PRAGMA(x) _Pragma(#x)
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#define ISR(vec) \
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/* function prototype for use with "require protoptypes" option. */ \
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PRAGMA(vector = vec) __interrupt void handler_##vec(void); \
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PRAGMA(vector = vec) __interrupt void handler_##vec(void)
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#elif defined(__GNUC__)
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#include <avr/interrupt.h>
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#endif
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/* Flash */
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#if defined(__ICCAVR__)
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#define FLASH_DECLARE(x) __flash x
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#elif defined(__GNUC__)
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#define FLASH_DECLARE(x) x __attribute__((__progmem__))
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#endif
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/* EEPROM */
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#if defined(__ICCAVR__)
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#define EEPROM_DECLARE(x) __eeprom x
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#endif
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#if defined(__GNUC__)
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#include <avr/eeprom.h>
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#define EEPROM_DECLARE(x) x __attribute__((section(".eeprom")))
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#endif
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/* IAR intrinsic routines */
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#if defined(__GNUC__)
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/* FIXME: intrinsic routines: map to assembler for size/speed */
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#define __multiply_unsigned(x, y) ((x) * (y))
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/* FIXME: __root means to not optimize or strip */
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#define __root
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#endif
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#endif
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