Updated IAR project files for BDK port on AVR. Added main loop I/O toggle to monitor timing.
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@@ -1054,7 +1054,7 @@
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</option>
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<option>
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<name>SCCStackSize</name>
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<state>0x200</state>
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<state>0x400</state>
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</option>
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<option>
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<name>SCExtCStack</name>
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@@ -1240,7 +1240,7 @@
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<name>CCDefines</name>
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<state>NDEBUG</state>
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<state>BACDL_MSTP</state>
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<state>MAX_APDU=256</state>
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<state>MAX_APDU=128</state>
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<state>BIG_ENDIAN=0</state>
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<state>MAX_TSM_TRANSACTIONS=0</state>
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<state>BACAPP_BOOLEAN</state>
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@@ -1357,7 +1357,7 @@
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</option>
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<option>
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<name>CCDebugInfo</name>
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<state>0</state>
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<state>1</state>
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</option>
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<option>
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<name>CCNoErrorMsg</name>
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@@ -1706,7 +1706,7 @@
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</option>
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<option>
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<name>OutputFile</name>
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<state>bacnet.a90</state>
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<state>bacnet.d90</state>
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</option>
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<option>
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<name>OutputFormat</name>
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@@ -1864,7 +1864,7 @@
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</option>
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<option>
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<name>DebugInformation</name>
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<state>1</state>
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<state>0</state>
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</option>
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<option>
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<name>RuntimeControl</name>
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