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Fix volatile variable access in at91sam7s port example.

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This commit is contained in:
skarg
2015-01-30 20:54:48 +00:00
parent c2533b6ead
commit dd271af2ed
3 changed files with 13 additions and 3 deletions
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bacnet-stack/ports/at91sam7s/main.c
+5 -1
View File
@@ -91,9 +91,13 @@ static inline void millisecond_timer(
static inline void init(
void)
{
unsigned int pcsr;
/* Initialize the Parallel I/O Controller A Peripheral Clock */
volatile AT91PS_PMC pPMC = AT91C_BASE_PMC;
pPMC->PMC_PCER = pPMC->PMC_PCSR | (1 << AT91C_ID_PIOA);
pcsr = pPMC->PMC_PCSR;
pPMC->PMC_PCER = pcsr | (1 << AT91C_ID_PIOA);
/* Set up the LEDs (PA0 - PA3) */
volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA;
bacnet-stack/ports/at91sam7s/rs485.c
+4 -1
View File
@@ -65,9 +65,12 @@ static int RS485_Baud = 38400;
void RS485_Initialize(
void)
{
unsigned int pcsr;
/* Enable the USART0 clock in the Power Management Controller */
volatile AT91PS_PMC pPMC = AT91C_BASE_PMC;
pPMC->PMC_PCER = pPMC->PMC_PCSR | (1 << AT91C_ID_US0);
pcsr = pPMC->PMC_PCSR;
pPMC->PMC_PCER = pcsr | (1 << AT91C_ID_US0);
/* Disable and clear USART0 interrupt
in AIC Interrupt Disable Command Register */
bacnet-stack/ports/at91sam7s/timer.c
+4 -1
View File
@@ -337,9 +337,12 @@ void Timer_Silence_Reset(
void TimerInit(
void)
{
unsigned int pcsr;
/* enable the Timer0 peripheral clock */
volatile AT91PS_PMC pPMC = AT91C_BASE_PMC;
pPMC->PMC_PCER = pPMC->PMC_PCSR | (1 << AT91C_ID_TC0);
pcsr = pPMC->PMC_PCSR;
pPMC->PMC_PCER = pcsr | (1 << AT91C_ID_TC0);
/* Set up the AIC registers for Timer 0 */
volatile AT91PS_AIC pAIC = AT91C_BASE_AIC;
/* Disable timer 0 interrupt */