Add clear of MCU status registers at initialization.

bacnet-stack/ports/bdk-atxx4-mstp/Makefile

@@ -147,8 +147,8 @@ DEFINES =
 
 OPTIMIZE_FLAGS = -mcall-prologues
 OPTIMIZE_FLAGS += -finline-functions-called-once
-# default is for debugging from AVR Studio
-OPTIMIZATION = -O0  $(OPTIMIZE_FLAGS)
+# default is for building from AVR Studio
+OPTIMIZATION = -Os  $(OPTIMIZE_FLAGS)
 DEBUGGING = -g
 ifeq (${BUILD},debug)
 OPTIMIZATION = -O0

bacnet-stack/ports/bdk-atxx4-mstp/dlmstp.c

@@ -1208,6 +1208,7 @@ uint16_t dlmstp_receive(
         MSTP_Flag.ReceivedValidFrameNotForUs = false;
     }
     if (Receive_State == MSTP_RECEIVE_STATE_IDLE) {
+        /* only do master state machine while rx is idle */
         while (MSTP_Master_Node_FSM()) {
             /* do nothing while some states fast transition */
         };

bacnet-stack/ports/bdk-atxx4-mstp/init.c

@@ -30,7 +30,9 @@
 void init(
     void)
 {
-    /* Initialize the Clock Prescaler for ATmega48/88/168 */
+    /* clear the MCU Status Register */
+    MCUSR = 0;
+    /* Initialize the Clock Prescaler */
     /* The default CLKPSx bits are factory set to 0011 */
     /* Enbable the Clock Prescaler */
     CLKPR = _BV(CLKPCE);

bacnet-stack/ports/bdk-atxx4-mstp/watchdog.c

@@ -99,7 +99,6 @@ void watchdog_init(
         }
         wdt_enable(value);
     } else {
-		MCUSR = 0;
         wdt_disable();
     }
 }