Fixed IAR embedded workbench atmega168 project by allocating more CSTACK space. Simplified the iar/gcc compatibility.

This commit is contained in:
skarg
2008-03-25 22:14:38 +00:00
parent a174b9bf59
commit 919f4b67bd
6 changed files with 115 additions and 23 deletions
+9 -2
View File
@@ -63,7 +63,7 @@
</option>
<option>
<name>SCCStackSize</name>
<state>0xff</state>
<state>0x200</state>
</option>
<option>
<name>SCExtCStack</name>
@@ -239,7 +239,7 @@
<option>
<name>CCDefines</name>
<state>BACDL_MSTP</state>
<state>MAX_APDU=128</state>
<state>MAX_APDU=50</state>
<state>BIG_ENDIAN=0</state>
<state>MAX_TSM_TRANSACTIONS=0</state>
<state>BACAPP_REAL</state>
@@ -247,6 +247,7 @@
<state>BACAPP_ENUMERATED</state>
<state>BACAPP_CHARACTER_STRING</state>
<state>BACAPP_OBJECT_ID</state>
<state>WRITE_PROPERTY</state>
</option>
<option>
<name>CCPreprocFile</name>
@@ -1953,6 +1954,9 @@
<file>
<name>$PROJ_DIR$\avr035.h</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\bacapp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\bacdcode.c</name>
</file>
@@ -2031,6 +2035,9 @@
<file>
<name>$PROJ_DIR$\..\..\src\whois.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\src\wp.c</name>
</file>
</project>
+3
View File
@@ -43,6 +43,9 @@
#define LED_NPDU_INIT() BIT_SET(DDRD, DDD5)
#define LED_NPDU_ON() BIT_CLEAR(PORTD, PD5)
#define LED_NPDU_OFF() BIT_SET(PORTD, PD5)
/* #define LED_NPDU PORTD_Bit5 */
/* #define LED_NPDU_OFF() {LED_NPDU = false;} */
/* #define LED_NPDU_ON() {LED_NPDU = true;} */
#define LED_GREEN_INIT() BIT_SET(DDRD, DDD4)
#define LED_GREEN_ON() BIT_CLEAR(PORTD, PD4)
+40 -13
View File
@@ -42,6 +42,7 @@
#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
#include <inavr.h>
#include <ioavr.h>
/* BitValue is used alot in GCC examples */
#define _BV(bit_num) (1 << (bit_num))
/* inline function */
@@ -52,13 +53,11 @@ static inline void _delay_us(
__delay_cycles(F_CPU / 1000000UL);
} while (microseconds--);
}
#endif
#else
/* GCC */
/* Input/Output Registers */
#if defined(__GNUC__)
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <avr/eeprom.h>
typedef struct {
unsigned char bit0:1;
@@ -182,18 +181,46 @@ typedef struct {
#define GPIOR2_Bit6 GPIO_BITREG(GPIOR2,6)
#define GPIOR2_Bit7 GPIO_BITREG(GPIOR2,7)
/* FIXME: intrinsic routines: map to assembler for size/speed */
#define __multiply_unsigned(x,y) ((x)*(y))
#endif
/* memory location */
#define __eeprom __attribute__((section (".eeprom")))
#define __flash __attribute__((progmem))
/* __root means to not optimize or strip */
#define __root
/* Global Interrupts */
#if defined(__GNUC__)
#define __enable_interrupt() sei()
#define __disable_interrupt() cli()
#endif
/* Interrupts */
#if defined(__ICCAVR__)
#define PRAGMA(x) _Pragma( #x )
#define ISR(vec) PRAGMA( vector=vec ) __interrupt void handler_##vec(void)
#endif
#if defined(__GNUC__)
#include <avr/interrupt.h>
#endif
/* Flash */
#if defined(__ICCAVR__)
#define FLASH_DECLARE(x) __flash x
#endif
#if defined(__GNUC__)
#define FLASH_DECLARE(x) x __attribute__((__progmem__))
#endif
/* EEPROM */
#if defined(__ICCAVR__)
#define EEPROM_DECLARE(x) __eeprom x
#endif
#if defined(__GNUC__)
#include <avr/eeprom.h>
#define EEPROM_DECLARE(x) x __attribute__((section (".eeprom")))
#endif
/* IAR intrinsic routines */
#if defined(__GNUC__)
/* FIXME: intrinsic routines: map to assembler for size/speed */
#define __multiply_unsigned(x,y) ((x)*(y))
/* FIXME: __root means to not optimize or strip */
#define __root
#endif
#endif
+60
View File
@@ -138,6 +138,63 @@ static void input_switch_read(
}
}
/* stack checking */
#if STACK_CHECK_ENABLED
#if defined(__GNUC__)
extern uint8_t _end;
extern uint8_t __stack;
#define STACK_CANARY (0xC5)
void StackPaint(void) __attribute__ ((naked)) __attribute__ ((section (".init1")));
void StackPaint(void)
{
#if 0
uint8_t *p = &_end;
while(p <= &__stack)
{
*p = STACK_CANARY;
p++;
}
#else
__asm volatile (" ldi r30,lo8(_end)\n"
" ldi r31,hi8(_end)\n"
" ldi r24,lo8(0xc5)\n" /* STACK_CANARY = 0xc5 */
" ldi r25,hi8(__stack)\n"
" rjmp .cmp\n"
".loop:\n"
" st Z+,r24\n"
".cmp:\n"
" cpi r30,lo8(__stack)\n"
" cpc r31,r25\n"
" brlo .loop\n"
" breq .loop"::);
#endif
}
static uint16_t StackCount(void)
{
const uint8_t *p = &_end;
uint16_t c = 0;
while(*p == STACK_CANARY && p <= &__stack)
{
p++;
c++;
}
return c;
}
static void Analog_Value_Task(void)
{
extern float AV_Present_Value[MAX_ANALOG_VALUES];
AV_Present_Value[0] = (float)StackCount();
}
#endif
#endif
static uint8_t PDUBuffer[MAX_MPDU];
int main(
void)
@@ -159,6 +216,9 @@ int main(
/* BACnet handling */
pdu_len = datalink_receive(&src, &PDUBuffer[0], sizeof(PDUBuffer), 0);
if (pdu_len) {
#if STACK_CHECK_ENABLED
Analog_Value_Task();
#endif
LED_NPDU_ON();
npdu_handler(&src, &PDUBuffer[0], pdu_len);
LED_NPDU_OFF();
+3 -2
View File
@@ -237,17 +237,18 @@ void RS485_Send_Data(
while (!BIT_CHECK(UCSR0A, UDRE0)) {
/* do nothing - wait until Tx buffer is empty */
}
/* Send the data byte */
UDR0 = *buffer;
buffer++;
nbytes--;
}
/* Clear the Transmit Complete flag by writing a one to it. */
BIT_SET(UCSR0A, TXC0);
/* was the frame sent? */
while (!BIT_CHECK(UCSR0A, TXC0)) {
/* do nothing - wait until the entire frame in the
Transmit Shift Register has been shifted out */
}
/* Clear the Transmit Complete flag by writing a one to it. */
BIT_SET(UCSR0A, TXC0);
/* per MSTP spec, sort of */
Timer_Silence_Reset();
}
-6
View File
@@ -71,13 +71,7 @@ void Timer_Initialize(
/* Timer interupt */
/* note: Global interupts must be enabled - sei() */
/* Timer Overflowed! Increment the time. */
#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
#pragma vector=TIMER0_OVF_vect
__interrupt void myTIMER0_OVF_vect(
)
#else
ISR(TIMER0_OVF_vect)
#endif
{
/* Set the counter for the next interrupt */
TCNT0 = TIMER_COUNT;