Fixed IAR embedded workbench atmega168 project by allocating more CSTACK space. Simplified the iar/gcc compatibility.
This commit is contained in:
@@ -63,7 +63,7 @@
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</option>
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<option>
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<name>SCCStackSize</name>
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<state>0xff</state>
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<state>0x200</state>
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</option>
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<option>
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<name>SCExtCStack</name>
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@@ -239,7 +239,7 @@
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<option>
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<name>CCDefines</name>
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<state>BACDL_MSTP</state>
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<state>MAX_APDU=128</state>
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<state>MAX_APDU=50</state>
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<state>BIG_ENDIAN=0</state>
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<state>MAX_TSM_TRANSACTIONS=0</state>
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<state>BACAPP_REAL</state>
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@@ -247,6 +247,7 @@
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<state>BACAPP_ENUMERATED</state>
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<state>BACAPP_CHARACTER_STRING</state>
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<state>BACAPP_OBJECT_ID</state>
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<state>WRITE_PROPERTY</state>
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</option>
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<option>
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<name>CCPreprocFile</name>
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@@ -1953,6 +1954,9 @@
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<file>
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<name>$PROJ_DIR$\avr035.h</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\src\bacapp.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\src\bacdcode.c</name>
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</file>
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@@ -2031,6 +2035,9 @@
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<file>
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<name>$PROJ_DIR$\..\..\src\whois.c</name>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\src\wp.c</name>
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</file>
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</project>
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@@ -43,6 +43,9 @@
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#define LED_NPDU_INIT() BIT_SET(DDRD, DDD5)
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#define LED_NPDU_ON() BIT_CLEAR(PORTD, PD5)
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#define LED_NPDU_OFF() BIT_SET(PORTD, PD5)
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/* #define LED_NPDU PORTD_Bit5 */
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/* #define LED_NPDU_OFF() {LED_NPDU = false;} */
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/* #define LED_NPDU_ON() {LED_NPDU = true;} */
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#define LED_GREEN_INIT() BIT_SET(DDRD, DDD4)
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#define LED_GREEN_ON() BIT_CLEAR(PORTD, PD4)
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@@ -42,6 +42,7 @@
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#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
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#include <inavr.h>
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#include <ioavr.h>
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/* BitValue is used alot in GCC examples */
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#define _BV(bit_num) (1 << (bit_num))
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/* inline function */
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@@ -52,13 +53,11 @@ static inline void _delay_us(
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__delay_cycles(F_CPU / 1000000UL);
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} while (microseconds--);
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}
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#endif
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#else
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/* GCC */
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/* Input/Output Registers */
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#if defined(__GNUC__)
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/delay.h>
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#include <avr/eeprom.h>
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typedef struct {
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unsigned char bit0:1;
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@@ -182,18 +181,46 @@ typedef struct {
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#define GPIOR2_Bit6 GPIO_BITREG(GPIOR2,6)
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#define GPIOR2_Bit7 GPIO_BITREG(GPIOR2,7)
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/* FIXME: intrinsic routines: map to assembler for size/speed */
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#define __multiply_unsigned(x,y) ((x)*(y))
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#endif
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/* memory location */
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#define __eeprom __attribute__((section (".eeprom")))
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#define __flash __attribute__((progmem))
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/* __root means to not optimize or strip */
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#define __root
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/* Global Interrupts */
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#if defined(__GNUC__)
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#define __enable_interrupt() sei()
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#define __disable_interrupt() cli()
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#endif
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/* Interrupts */
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#if defined(__ICCAVR__)
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#define PRAGMA(x) _Pragma( #x )
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#define ISR(vec) PRAGMA( vector=vec ) __interrupt void handler_##vec(void)
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#endif
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#if defined(__GNUC__)
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#include <avr/interrupt.h>
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#endif
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/* Flash */
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#if defined(__ICCAVR__)
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#define FLASH_DECLARE(x) __flash x
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#endif
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#if defined(__GNUC__)
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#define FLASH_DECLARE(x) x __attribute__((__progmem__))
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#endif
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/* EEPROM */
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#if defined(__ICCAVR__)
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#define EEPROM_DECLARE(x) __eeprom x
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#endif
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#if defined(__GNUC__)
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#include <avr/eeprom.h>
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#define EEPROM_DECLARE(x) x __attribute__((section (".eeprom")))
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#endif
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/* IAR intrinsic routines */
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#if defined(__GNUC__)
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/* FIXME: intrinsic routines: map to assembler for size/speed */
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#define __multiply_unsigned(x,y) ((x)*(y))
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/* FIXME: __root means to not optimize or strip */
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#define __root
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#endif
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#endif
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@@ -138,6 +138,63 @@ static void input_switch_read(
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}
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}
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/* stack checking */
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#if STACK_CHECK_ENABLED
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#if defined(__GNUC__)
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extern uint8_t _end;
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extern uint8_t __stack;
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#define STACK_CANARY (0xC5)
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void StackPaint(void) __attribute__ ((naked)) __attribute__ ((section (".init1")));
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void StackPaint(void)
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{
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#if 0
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uint8_t *p = &_end;
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while(p <= &__stack)
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{
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*p = STACK_CANARY;
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p++;
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}
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#else
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__asm volatile (" ldi r30,lo8(_end)\n"
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" ldi r31,hi8(_end)\n"
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" ldi r24,lo8(0xc5)\n" /* STACK_CANARY = 0xc5 */
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" ldi r25,hi8(__stack)\n"
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" rjmp .cmp\n"
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".loop:\n"
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" st Z+,r24\n"
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".cmp:\n"
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" cpi r30,lo8(__stack)\n"
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" cpc r31,r25\n"
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" brlo .loop\n"
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" breq .loop"::);
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#endif
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}
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static uint16_t StackCount(void)
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{
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const uint8_t *p = &_end;
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uint16_t c = 0;
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while(*p == STACK_CANARY && p <= &__stack)
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{
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p++;
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c++;
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}
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return c;
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}
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static void Analog_Value_Task(void)
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{
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extern float AV_Present_Value[MAX_ANALOG_VALUES];
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AV_Present_Value[0] = (float)StackCount();
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}
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#endif
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#endif
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static uint8_t PDUBuffer[MAX_MPDU];
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int main(
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void)
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@@ -159,6 +216,9 @@ int main(
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/* BACnet handling */
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pdu_len = datalink_receive(&src, &PDUBuffer[0], sizeof(PDUBuffer), 0);
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if (pdu_len) {
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#if STACK_CHECK_ENABLED
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Analog_Value_Task();
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#endif
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LED_NPDU_ON();
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npdu_handler(&src, &PDUBuffer[0], pdu_len);
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LED_NPDU_OFF();
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@@ -237,17 +237,18 @@ void RS485_Send_Data(
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while (!BIT_CHECK(UCSR0A, UDRE0)) {
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/* do nothing - wait until Tx buffer is empty */
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}
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/* Send the data byte */
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UDR0 = *buffer;
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buffer++;
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nbytes--;
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}
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/* Clear the Transmit Complete flag by writing a one to it. */
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BIT_SET(UCSR0A, TXC0);
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/* was the frame sent? */
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while (!BIT_CHECK(UCSR0A, TXC0)) {
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/* do nothing - wait until the entire frame in the
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Transmit Shift Register has been shifted out */
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}
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/* Clear the Transmit Complete flag by writing a one to it. */
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BIT_SET(UCSR0A, TXC0);
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/* per MSTP spec, sort of */
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Timer_Silence_Reset();
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}
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@@ -71,13 +71,7 @@ void Timer_Initialize(
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/* Timer interupt */
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/* note: Global interupts must be enabled - sei() */
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/* Timer Overflowed! Increment the time. */
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#if defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ASM__)
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#pragma vector=TIMER0_OVF_vect
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__interrupt void myTIMER0_OVF_vect(
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)
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#else
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ISR(TIMER0_OVF_vect)
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#endif
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{
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/* Set the counter for the next interrupt */
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TCNT0 = TIMER_COUNT;
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