Files
sdk/tests/corelib_2
Ryan Macnak d34e7b0500 [vm, compiler] RISC-V BigInt intrinsics.
Note that unlike x86 and ARM, RISC-V has no carry flag, so we must synthesize the carry in a GPR using sltu.

TEST=ci, RSA
Change-Id: I24898cb8b7166d5769ae98c535ec29b2206340d7
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/235063
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Ryan Macnak <rmacnak@google.com>
2022-03-08 18:08:44 +00:00
..
2021-05-05 01:06:12 +00:00