kmillikin@google.com
3e78b2ad4a
This reapplies SVN r24024 with a bugfix. After OSR compilation, restore the pre-OSR code (which might be already optimized) rather than the unoptimized code (which might have its entry patched). When the optimized code entry is patched it is only safe to call it as a static call, not as an instance call. R=fschneider@google.com Review URL: https://codereview.chromium.org//17233003 git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24088 260f80e4-7a28-3924-810f-c04153c831b5
933 lines
27 KiB
C++
933 lines
27 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#ifndef VM_ASSEMBLER_X64_H_
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#define VM_ASSEMBLER_X64_H_
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#ifndef VM_ASSEMBLER_H_
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#error Do not include assembler_x64.h directly; use assembler.h instead.
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#endif
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#include "platform/assert.h"
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#include "platform/utils.h"
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#include "vm/constants_x64.h"
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namespace dart {
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// Forward declarations.
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class RuntimeEntry;
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class Immediate : public ValueObject {
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public:
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explicit Immediate(int64_t value) : value_(value) { }
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Immediate(const Immediate& other) : ValueObject(), value_(other.value_) { }
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int64_t value() const { return value_; }
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bool is_int8() const { return Utils::IsInt(8, value_); }
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bool is_uint8() const { return Utils::IsUint(8, value_); }
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bool is_uint16() const { return Utils::IsUint(16, value_); }
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bool is_int32() const { return Utils::IsInt(32, value_); }
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private:
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const int64_t value_;
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// TODO(5411081): Add DISALLOW_COPY_AND_ASSIGN(Immediate) once the mac
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// build issue is resolved.
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// And remove the unnecessary copy constructor.
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};
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class Operand : public ValueObject {
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public:
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uint8_t rex() const {
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return rex_;
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}
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uint8_t mod() const {
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return (encoding_at(0) >> 6) & 3;
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}
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Register rm() const {
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int rm_rex = (rex_ & REX_B) << 3;
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return static_cast<Register>(rm_rex + (encoding_at(0) & 7));
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}
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ScaleFactor scale() const {
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return static_cast<ScaleFactor>((encoding_at(1) >> 6) & 3);
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}
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Register index() const {
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int index_rex = (rex_ & REX_X) << 2;
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return static_cast<Register>(index_rex + ((encoding_at(1) >> 3) & 7));
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}
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Register base() const {
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int base_rex = (rex_ & REX_B) << 3;
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return static_cast<Register>(base_rex + (encoding_at(1) & 7));
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}
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int8_t disp8() const {
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ASSERT(length_ >= 2);
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return static_cast<int8_t>(encoding_[length_ - 1]);
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}
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int32_t disp32() const {
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ASSERT(length_ >= 5);
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return bit_copy<int32_t>(encoding_[length_ - 4]);
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}
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Operand(const Operand& other)
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: ValueObject(), length_(other.length_), rex_(other.rex_) {
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memmove(&encoding_[0], &other.encoding_[0], other.length_);
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}
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Operand& operator=(const Operand& other) {
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length_ = other.length_;
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rex_ = other.rex_;
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memmove(&encoding_[0], &other.encoding_[0], other.length_);
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return *this;
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}
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bool Equals(const Operand& other) {
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if (length_ != other.length_) return false;
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if (rex_ != other.rex_) return false;
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for (uint8_t i = 0; i < length_; i++) {
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if (encoding_[i] != other.encoding_[i]) return false;
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}
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return true;
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}
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protected:
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Operand() : length_(0), rex_(REX_NONE) { } // Needed by subclass Address.
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void SetModRM(int mod, Register rm) {
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ASSERT((mod & ~3) == 0);
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if ((rm > 7) && !((rm == R12) && (mod != 3))) {
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rex_ |= REX_B;
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}
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encoding_[0] = (mod << 6) | (rm & 7);
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length_ = 1;
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}
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void SetSIB(ScaleFactor scale, Register index, Register base) {
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ASSERT(length_ == 1);
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ASSERT((scale & ~3) == 0);
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if (base > 7) {
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ASSERT((rex_ & REX_B) == 0); // Must not have REX.B already set.
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rex_ |= REX_B;
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}
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if (index > 7) rex_ |= REX_X;
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encoding_[1] = (scale << 6) | ((index & 7) << 3) | (base & 7);
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length_ = 2;
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}
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void SetDisp8(int8_t disp) {
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ASSERT(length_ == 1 || length_ == 2);
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encoding_[length_++] = static_cast<uint8_t>(disp);
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}
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void SetDisp32(int32_t disp) {
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ASSERT(length_ == 1 || length_ == 2);
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memmove(&encoding_[length_], &disp, sizeof(disp));
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length_ += sizeof(disp);
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}
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private:
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uint8_t length_;
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uint8_t rex_;
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uint8_t encoding_[6];
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explicit Operand(Register reg) : rex_(REX_NONE) { SetModRM(3, reg); }
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// Get the operand encoding byte at the given index.
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uint8_t encoding_at(int index) const {
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ASSERT(index >= 0 && index < length_);
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return encoding_[index];
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}
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// Returns whether or not this operand is really the given register in
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// disguise. Used from the assembler to generate better encodings.
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bool IsRegister(Register reg) const {
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return ((reg > 7 ? 1 : 0) == (rex_ & REX_B)) // REX.B match.
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&& ((encoding_at(0) & 0xF8) == 0xC0) // Addressing mode is register.
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&& ((encoding_at(0) & 0x07) == reg); // Register codes match.
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}
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friend class Assembler;
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};
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class Address : public Operand {
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public:
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Address(Register base, int32_t disp) {
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if ((disp == 0) && ((base & 7) != RBP)) {
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SetModRM(0, base);
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if ((base & 7) == RSP) {
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SetSIB(TIMES_1, RSP, base);
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}
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} else if (Utils::IsInt(8, disp)) {
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SetModRM(1, base);
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if ((base & 7) == RSP) {
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SetSIB(TIMES_1, RSP, base);
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}
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SetDisp8(disp);
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} else {
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SetModRM(2, base);
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if ((base & 7) == RSP) {
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SetSIB(TIMES_1, RSP, base);
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}
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SetDisp32(disp);
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}
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}
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Address(Register index, ScaleFactor scale, int32_t disp) {
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ASSERT(index != RSP); // Illegal addressing mode.
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SetModRM(0, RSP);
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SetSIB(scale, index, RBP);
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SetDisp32(disp);
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}
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Address(Register base, Register index, ScaleFactor scale, int32_t disp) {
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ASSERT(index != RSP); // Illegal addressing mode.
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if ((disp == 0) && ((base & 7) != RBP)) {
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SetModRM(0, RSP);
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SetSIB(scale, index, base);
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} else if (Utils::IsInt(8, disp)) {
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SetModRM(1, RSP);
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SetSIB(scale, index, base);
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SetDisp8(disp);
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} else {
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SetModRM(2, RSP);
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SetSIB(scale, index, base);
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SetDisp32(disp);
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}
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}
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Address(const Address& other) : Operand(other) { }
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Address& operator=(const Address& other) {
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Operand::operator=(other);
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return *this;
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}
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};
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class FieldAddress : public Address {
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public:
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FieldAddress(Register base, int32_t disp)
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: Address(base, disp - kHeapObjectTag) { }
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FieldAddress(Register base, Register index, ScaleFactor scale, int32_t disp)
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: Address(base, index, scale, disp - kHeapObjectTag) { }
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FieldAddress(const FieldAddress& other) : Address(other) { }
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FieldAddress& operator=(const FieldAddress& other) {
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Address::operator=(other);
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return *this;
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}
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};
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class Label : public ValueObject {
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public:
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Label() : position_(0), unresolved_(0) {
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#ifdef DEBUG
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for (int i = 0; i < kMaxUnresolvedBranches; i++) {
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unresolved_near_positions_[i] = -1;
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}
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#endif // DEBUG
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}
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~Label() {
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// Assert if label is being destroyed with unresolved branches pending.
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ASSERT(!IsLinked());
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ASSERT(!HasNear());
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}
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// Returns the position for bound labels. Cannot be used for unused or linked
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// labels.
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int Position() const {
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ASSERT(IsBound());
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return -position_ - kWordSize;
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}
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int LinkPosition() const {
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ASSERT(IsLinked());
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return position_ - kWordSize;
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}
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int NearPosition() {
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ASSERT(HasNear());
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return unresolved_near_positions_[--unresolved_];
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}
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bool IsBound() const { return position_ < 0; }
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bool IsUnused() const { return (position_ == 0) && (unresolved_ == 0); }
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bool IsLinked() const { return position_ > 0; }
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bool HasNear() const { return unresolved_ != 0; }
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private:
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void BindTo(int position) {
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ASSERT(!IsBound());
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ASSERT(!HasNear());
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position_ = -position - kWordSize;
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ASSERT(IsBound());
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}
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void LinkTo(int position) {
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ASSERT(!IsBound());
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position_ = position + kWordSize;
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ASSERT(IsLinked());
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}
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void NearLinkTo(int position) {
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ASSERT(!IsBound());
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ASSERT(unresolved_ < kMaxUnresolvedBranches);
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unresolved_near_positions_[unresolved_++] = position;
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}
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static const int kMaxUnresolvedBranches = 20;
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int position_;
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int unresolved_;
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int unresolved_near_positions_[kMaxUnresolvedBranches];
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friend class Assembler;
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DISALLOW_COPY_AND_ASSIGN(Label);
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};
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class CPUFeatures : public AllStatic {
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public:
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static void InitOnce();
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// x64 always has at least SSE2.
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static bool sse2_supported() { return true; }
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static bool sse4_1_supported();
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static bool double_truncate_round_supported() { return sse4_1_supported(); }
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private:
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static const uint64_t kSSE4_1BitMask = static_cast<uint64_t>(1) << 51;
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static bool sse4_1_supported_;
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#ifdef DEBUG
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static bool initialized_;
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#endif
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};
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class Assembler : public ValueObject {
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public:
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Assembler()
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: buffer_(),
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object_pool_(GrowableObjectArray::Handle()),
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prologue_offset_(-1),
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comments_() { }
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~Assembler() { }
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static const bool kNearJump = true;
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static const bool kFarJump = false;
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/*
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* Emit Machine Instructions.
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*/
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void call(Register reg);
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void call(const Address& address);
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void call(Label* label);
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void call(const ExternalLabel* label);
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static const intptr_t kCallExternalLabelSize = 13;
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void pushq(Register reg);
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void pushq(const Address& address);
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void pushq(const Immediate& imm);
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void popq(Register reg);
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void popq(const Address& address);
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void setcc(Condition condition, ByteRegister dst);
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void movl(Register dst, Register src);
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void movl(Register dst, const Immediate& imm);
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void movl(Register dst, const Address& src);
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void movl(const Address& dst, Register src);
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void movzxb(Register dst, Register src);
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void movzxb(Register dst, const Address& src);
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void movsxb(Register dst, Register src);
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void movsxb(Register dst, const Address& src);
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void movb(Register dst, const Address& src);
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void movb(const Address& dst, Register src);
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void movb(const Address& dst, const Immediate& imm);
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void movzxw(Register dst, Register src);
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void movzxw(Register dst, const Address& src);
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void movsxw(Register dst, Register src);
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void movsxw(Register dst, const Address& src);
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void movw(Register dst, const Address& src);
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void movw(const Address& dst, Register src);
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void movq(Register dst, const Immediate& imm);
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void movq(Register dst, Register src);
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void movq(Register dst, const Address& src);
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void movq(const Address& dst, Register src);
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void movq(const Address& dst, const Immediate& imm);
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void movsxd(Register dst, Register src);
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void movsxd(Register dst, const Address& src);
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void rep_movsb();
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void leaq(Register dst, const Address& src);
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void movss(XmmRegister dst, const Address& src);
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void movss(const Address& dst, XmmRegister src);
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void movss(XmmRegister dst, XmmRegister src);
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void movd(XmmRegister dst, Register src);
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void movd(Register dst, XmmRegister src);
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void addss(XmmRegister dst, XmmRegister src);
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void subss(XmmRegister dst, XmmRegister src);
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void mulss(XmmRegister dst, XmmRegister src);
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void divss(XmmRegister dst, XmmRegister src);
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void movsd(XmmRegister dst, const Address& src);
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void movsd(const Address& dst, XmmRegister src);
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void movsd(XmmRegister dst, XmmRegister src);
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void movaps(XmmRegister dst, XmmRegister src);
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void movups(const Address& dst, XmmRegister src);
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void movups(XmmRegister dst, const Address& src);
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void addsd(XmmRegister dst, XmmRegister src);
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void subsd(XmmRegister dst, XmmRegister src);
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void mulsd(XmmRegister dst, XmmRegister src);
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void divsd(XmmRegister dst, XmmRegister src);
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void addps(XmmRegister dst, XmmRegister src);
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void subps(XmmRegister dst, XmmRegister src);
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void divps(XmmRegister dst, XmmRegister src);
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void mulps(XmmRegister dst, XmmRegister src);
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void minps(XmmRegister dst, XmmRegister src);
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void maxps(XmmRegister dst, XmmRegister src);
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void andps(XmmRegister dst, XmmRegister src);
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void andps(XmmRegister dst, const Address& src);
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void orps(XmmRegister dst, XmmRegister src);
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void notps(XmmRegister dst);
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void negateps(XmmRegister dst);
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void absps(XmmRegister dst);
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void zerowps(XmmRegister dst);
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void cmppseq(XmmRegister dst, XmmRegister src);
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void cmppsneq(XmmRegister dst, XmmRegister src);
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void cmppslt(XmmRegister dst, XmmRegister src);
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void cmppsle(XmmRegister dst, XmmRegister src);
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void cmppsnlt(XmmRegister dst, XmmRegister src);
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void cmppsnle(XmmRegister dst, XmmRegister src);
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void sqrtps(XmmRegister dst);
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void rsqrtps(XmmRegister dst);
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void reciprocalps(XmmRegister dst);
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void set1ps(XmmRegister dst, Register tmp, const Immediate& imm);
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void shufps(XmmRegister dst, XmmRegister src, const Immediate& mask);
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void comisd(XmmRegister a, XmmRegister b);
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void cvtsi2sd(XmmRegister a, Register b);
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void cvttsd2siq(Register dst, XmmRegister src);
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void cvtss2sd(XmmRegister dst, XmmRegister src);
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void cvtsd2ss(XmmRegister dst, XmmRegister src);
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void pxor(XmmRegister dst, XmmRegister src);
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enum RoundingMode {
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kRoundToNearest = 0x0,
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kRoundDown = 0x1,
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kRoundUp = 0x2,
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kRoundToZero = 0x3
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};
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void roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode);
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void xchgl(Register dst, Register src);
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void xchgq(Register dst, Register src);
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void cmpl(Register reg, const Immediate& imm);
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void cmpl(Register reg0, Register reg1);
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void cmpl(Register reg, const Address& address);
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void cmpl(const Address& address, const Immediate& imm);
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void cmpq(Register reg, const Immediate& imm);
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void cmpq(const Address& address, Register reg);
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void cmpq(const Address& address, const Immediate& imm);
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void cmpq(Register reg0, Register reg1);
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void cmpq(Register reg, const Address& address);
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void testl(Register reg1, Register reg2);
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void testl(Register reg, const Immediate& imm);
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void testq(Register reg1, Register reg2);
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void testq(Register reg, const Immediate& imm);
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void andl(Register dst, Register src);
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void andl(Register dst, const Immediate& imm);
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void orl(Register dst, Register src);
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void orl(Register dst, const Immediate& imm);
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void xorl(Register dst, Register src);
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void andq(Register dst, Register src);
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void andq(Register dst, const Address& address);
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void andq(Register dst, const Immediate& imm);
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void orq(Register dst, Register src);
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void orq(Register dst, const Address& address);
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void orq(Register dst, const Immediate& imm);
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void xorq(Register dst, Register src);
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void xorq(Register dst, const Address& address);
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void xorq(const Address& dst, Register src);
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void xorq(Register dst, const Immediate& imm);
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void addl(Register dst, Register src);
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void addl(const Address& address, const Immediate& imm);
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void addq(Register dst, Register src);
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void addq(Register reg, const Immediate& imm);
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void addq(Register reg, const Address& address);
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void addq(const Address& address, const Immediate& imm);
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void addq(const Address& address, Register reg);
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void adcl(Register dst, Register src);
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void subl(Register dst, Register src);
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void cdq();
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void cqo();
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void idivl(Register reg);
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void idivq(Register reg);
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void imull(Register dst, Register src);
|
|
void imull(Register reg, const Immediate& imm);
|
|
|
|
void imulq(Register dst, Register src);
|
|
void imulq(Register dst, const Address& address);
|
|
void imulq(Register dst, const Immediate& imm);
|
|
|
|
void subq(Register dst, Register src);
|
|
void subq(Register reg, const Immediate& imm);
|
|
void subq(Register reg, const Address& address);
|
|
|
|
void shll(Register reg, const Immediate& imm);
|
|
void shll(Register operand, Register shifter);
|
|
void shrl(Register reg, const Immediate& imm);
|
|
void shrl(Register operand, Register shifter);
|
|
void sarl(Register reg, const Immediate& imm);
|
|
void sarl(Register operand, Register shifter);
|
|
|
|
void shlq(Register reg, const Immediate& imm);
|
|
void shlq(Register operand, Register shifter);
|
|
void shrq(Register reg, const Immediate& imm);
|
|
void shrq(Register operand, Register shifter);
|
|
void sarq(Register reg, const Immediate& imm);
|
|
void sarq(Register operand, Register shifter);
|
|
|
|
void incl(const Address& address);
|
|
void decl(const Address& address);
|
|
|
|
void incq(Register reg);
|
|
void incq(const Address& address);
|
|
void decq(Register reg);
|
|
void decq(const Address& address);
|
|
|
|
void negl(Register reg);
|
|
void negq(Register reg);
|
|
void notl(Register reg);
|
|
void notq(Register reg);
|
|
|
|
void enter(const Immediate& imm);
|
|
void leave();
|
|
void ret();
|
|
|
|
void movmskpd(Register dst, XmmRegister src);
|
|
void movmskps(Register dst, XmmRegister src);
|
|
|
|
void sqrtsd(XmmRegister dst, XmmRegister src);
|
|
|
|
void xorpd(XmmRegister dst, const Address& src);
|
|
void xorpd(XmmRegister dst, XmmRegister src);
|
|
|
|
void xorps(XmmRegister dst, const Address& src);
|
|
void xorps(XmmRegister dst, XmmRegister src);
|
|
|
|
void andpd(XmmRegister dst, const Address& src);
|
|
|
|
void fldl(const Address& src);
|
|
void fstpl(const Address& dst);
|
|
|
|
void fildl(const Address& src);
|
|
|
|
void fincstp();
|
|
void ffree(intptr_t value);
|
|
|
|
void fsin();
|
|
void fcos();
|
|
|
|
// 'size' indicates size in bytes and must be in the range 1..8.
|
|
void nop(int size = 1);
|
|
void int3();
|
|
void hlt();
|
|
|
|
void j(Condition condition, Label* label, bool near = kFarJump);
|
|
void j(Condition condition, const ExternalLabel* label);
|
|
|
|
void jmp(Register reg);
|
|
void jmp(Label* label, bool near = kFarJump);
|
|
void jmp(const ExternalLabel* label);
|
|
|
|
void lock();
|
|
void cmpxchgl(const Address& address, Register reg);
|
|
void lock_cmpxchgl(const Address& address, Register reg) {
|
|
lock();
|
|
cmpxchgl(address, reg);
|
|
}
|
|
|
|
void cmpxchgq(const Address& address, Register reg);
|
|
void lock_cmpxchgq(const Address& address, Register reg) {
|
|
lock();
|
|
cmpxchgq(address, reg);
|
|
}
|
|
|
|
void cpuid();
|
|
|
|
// Issue memory to memory move through a TMP register.
|
|
void MoveMemoryToMemory(const Address& dst, const Address& src) {
|
|
movq(TMP, src);
|
|
movq(dst, TMP);
|
|
}
|
|
|
|
void Exchange(Register reg, const Address& mem) {
|
|
movq(TMP, mem);
|
|
movq(mem, reg);
|
|
movq(reg, TMP);
|
|
}
|
|
|
|
void Exchange(const Address& mem1, const Address& mem2) {
|
|
movq(TMP, mem1);
|
|
xorq(TMP, mem2);
|
|
xorq(mem1, TMP);
|
|
xorq(mem2, TMP);
|
|
}
|
|
|
|
/*
|
|
* Macros for High-level operations and implemented on all architectures.
|
|
*/
|
|
|
|
void CompareRegisters(Register a, Register b);
|
|
|
|
// Issues a move instruction if 'to' is not the same as 'from'.
|
|
void MoveRegister(Register to, Register from);
|
|
void PopRegister(Register r);
|
|
|
|
void AddImmediate(Register reg, const Immediate& imm);
|
|
|
|
void Drop(intptr_t stack_elements);
|
|
|
|
void LoadObject(Register dst, const Object& object);
|
|
void StoreObject(const Address& dst, const Object& obj);
|
|
void PushObject(const Object& object);
|
|
void CompareObject(Register reg, const Object& object);
|
|
void LoadDoubleConstant(XmmRegister dst, double value);
|
|
|
|
// Destroys value.
|
|
void StoreIntoObject(Register object, // Object we are storing into.
|
|
const Address& dest, // Where we are storing into.
|
|
Register value, // Value we are storing.
|
|
bool can_value_be_smi = true);
|
|
|
|
void StoreIntoObjectNoBarrier(Register object,
|
|
const Address& dest,
|
|
Register value);
|
|
|
|
void DoubleNegate(XmmRegister d);
|
|
void FloatNegate(XmmRegister f);
|
|
|
|
void DoubleAbs(XmmRegister reg);
|
|
|
|
void LockCmpxchgl(const Address& address, Register reg) {
|
|
lock();
|
|
cmpxchgl(address, reg);
|
|
}
|
|
|
|
void EnterFrame(intptr_t frame_space);
|
|
void LeaveFrame();
|
|
void ReserveAlignedFrameSpace(intptr_t frame_space);
|
|
|
|
// Create a frame for calling into runtime that preserves all volatile
|
|
// registers. Frame's RSP is guaranteed to be correctly aligned and
|
|
// frame_space bytes are reserved under it.
|
|
void EnterCallRuntimeFrame(intptr_t frame_space);
|
|
void LeaveCallRuntimeFrame();
|
|
|
|
|
|
void CallRuntime(const RuntimeEntry& entry);
|
|
|
|
/*
|
|
* Loading and comparing classes of objects.
|
|
*/
|
|
void LoadClassId(Register result, Register object);
|
|
|
|
void LoadClassById(Register result, Register class_id);
|
|
|
|
void LoadClass(Register result, Register object);
|
|
|
|
void CompareClassId(Register object, intptr_t class_id);
|
|
|
|
/*
|
|
* Misc. functionality.
|
|
*/
|
|
void SmiTag(Register reg) {
|
|
addq(reg, reg);
|
|
}
|
|
|
|
void SmiUntag(Register reg) {
|
|
sarq(reg, Immediate(kSmiTagSize));
|
|
}
|
|
|
|
int PreferredLoopAlignment() { return 16; }
|
|
void Align(int alignment, int offset);
|
|
void Bind(Label* label);
|
|
|
|
void Comment(const char* format, ...) PRINTF_ATTRIBUTE(2, 3);
|
|
const Code::Comments& GetCodeComments() const;
|
|
|
|
int CodeSize() const { return buffer_.Size(); }
|
|
int prologue_offset() const { return prologue_offset_; }
|
|
const ZoneGrowableArray<int>& GetPointerOffsets() const {
|
|
return buffer_.pointer_offsets();
|
|
}
|
|
const GrowableObjectArray& object_pool() const { return object_pool_; }
|
|
|
|
void FinalizeInstructions(const MemoryRegion& region) {
|
|
buffer_.FinalizeInstructions(region);
|
|
}
|
|
|
|
// Set up a Dart frame on entry with a frame pointer and PC information to
|
|
// enable easy access to the RawInstruction object of code corresponding
|
|
// to this frame.
|
|
// The dart frame layout is as follows:
|
|
// ....
|
|
// ret PC
|
|
// saved RBP <=== RBP
|
|
// pc (used to derive the RawInstruction Object of the dart code)
|
|
// locals space <=== RSP
|
|
// .....
|
|
// This code sets this up with the sequence:
|
|
// pushq rbp
|
|
// movq rbp, rsp
|
|
// call L
|
|
// L: <code to adjust saved pc if there is any intrinsification code>
|
|
// .....
|
|
void EnterDartFrame(intptr_t frame_size);
|
|
|
|
// Set up a Dart frame for a function compiled for on-stack replacement.
|
|
// The frame layout is a normal Dart frame, but the frame is partially set
|
|
// up on entry (it is the frame of the unoptimized code).
|
|
void EnterOsrFrame(intptr_t extra_size);
|
|
|
|
// Set up a stub frame so that the stack traversal code can easily identify
|
|
// a stub frame.
|
|
// The stub frame layout is as follows:
|
|
// ....
|
|
// ret PC
|
|
// saved RBP
|
|
// pc (used to derive the RawInstruction Object of the stub)
|
|
// .....
|
|
// This code sets this up with the sequence:
|
|
// pushq rbp
|
|
// movq rbp, rsp
|
|
// pushq immediate(0)
|
|
// .....
|
|
void EnterStubFrame();
|
|
|
|
// Instruction pattern from entrypoint is used in dart frame prologs
|
|
// to set up the frame and save a PC which can be used to figure out the
|
|
// RawInstruction object corresponding to the code running in the frame.
|
|
// entrypoint:
|
|
// pushq rbp (size is 1 byte)
|
|
// movq rbp, rsp (size is 3 bytes)
|
|
// call L (size is 5 bytes)
|
|
// L:
|
|
static const intptr_t kEntryPointToPcMarkerOffset = 9;
|
|
|
|
// Inlined allocation of an instance of class 'cls', code has no runtime
|
|
// calls. Jump to 'failure' if the instance cannot be allocated here.
|
|
// Allocated instance is returned in 'instance_reg'.
|
|
// Only the tags field of the object is initialized.
|
|
void TryAllocate(const Class& cls,
|
|
Label* failure,
|
|
bool near_jump,
|
|
Register instance_reg);
|
|
|
|
// Debugging and bringup support.
|
|
void Stop(const char* message);
|
|
void Unimplemented(const char* message);
|
|
void Untested(const char* message);
|
|
void Unreachable(const char* message);
|
|
|
|
static void InitializeMemoryWithBreakpoints(uword data, int length);
|
|
|
|
static const char* RegisterName(Register reg);
|
|
|
|
static const char* FpuRegisterName(FpuRegister reg);
|
|
|
|
private:
|
|
AssemblerBuffer buffer_;
|
|
GrowableObjectArray& object_pool_; // Object pool is not used on x64.
|
|
int prologue_offset_;
|
|
|
|
class CodeComment : public ZoneAllocated {
|
|
public:
|
|
CodeComment(intptr_t pc_offset, const String& comment)
|
|
: pc_offset_(pc_offset), comment_(comment) { }
|
|
|
|
intptr_t pc_offset() const { return pc_offset_; }
|
|
const String& comment() const { return comment_; }
|
|
|
|
private:
|
|
intptr_t pc_offset_;
|
|
const String& comment_;
|
|
|
|
DISALLOW_COPY_AND_ASSIGN(CodeComment);
|
|
};
|
|
|
|
GrowableArray<CodeComment*> comments_;
|
|
|
|
inline void EmitUint8(uint8_t value);
|
|
inline void EmitInt32(int32_t value);
|
|
inline void EmitInt64(int64_t value);
|
|
|
|
inline void EmitRegisterREX(Register reg, uint8_t rex);
|
|
inline void EmitRegisterOperand(int rm, int reg);
|
|
inline void EmitOperandREX(int rm, const Operand& operand, uint8_t rex);
|
|
inline void EmitXmmRegisterOperand(int rm, XmmRegister reg);
|
|
inline void EmitFixup(AssemblerFixup* fixup);
|
|
inline void EmitOperandSizeOverride();
|
|
inline void EmitREX_RB(XmmRegister reg,
|
|
XmmRegister base,
|
|
uint8_t rex = REX_NONE);
|
|
inline void EmitREX_RB(XmmRegister reg,
|
|
const Operand& operand,
|
|
uint8_t rex = REX_NONE);
|
|
inline void EmitREX_RB(XmmRegister reg,
|
|
Register base,
|
|
uint8_t rex = REX_NONE);
|
|
inline void EmitREX_RB(Register reg,
|
|
XmmRegister base,
|
|
uint8_t rex = REX_NONE);
|
|
void EmitOperand(int rm, const Operand& operand);
|
|
void EmitImmediate(const Immediate& imm);
|
|
void EmitComplex(int rm, const Operand& operand, const Immediate& immediate);
|
|
void EmitLabel(Label* label, int instruction_size);
|
|
void EmitLabelLink(Label* label);
|
|
void EmitNearLabelLink(Label* label);
|
|
|
|
void EmitGenericShift(bool wide, int rm, Register reg, const Immediate& imm);
|
|
void EmitGenericShift(bool wide, int rm, Register operand, Register shifter);
|
|
|
|
void StoreIntoObjectFilter(Register object, Register value, Label* no_update);
|
|
|
|
// Shorter filtering sequence that assumes that value is not a smi.
|
|
void StoreIntoObjectFilterNoSmi(Register object,
|
|
Register value,
|
|
Label* no_update);
|
|
|
|
DISALLOW_ALLOCATION();
|
|
DISALLOW_COPY_AND_ASSIGN(Assembler);
|
|
};
|
|
|
|
|
|
inline void Assembler::EmitUint8(uint8_t value) {
|
|
buffer_.Emit<uint8_t>(value);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitInt32(int32_t value) {
|
|
buffer_.Emit<int32_t>(value);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitInt64(int64_t value) {
|
|
buffer_.Emit<int64_t>(value);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitRegisterREX(Register reg, uint8_t rex) {
|
|
ASSERT(reg != kNoRegister);
|
|
rex |= (reg > 7 ? REX_B : REX_NONE);
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitOperandREX(int rm,
|
|
const Operand& operand,
|
|
uint8_t rex) {
|
|
rex |= (rm > 7 ? REX_R : REX_NONE) | operand.rex();
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitREX_RB(XmmRegister reg,
|
|
XmmRegister base,
|
|
uint8_t rex) {
|
|
if (reg > 7) rex |= REX_R;
|
|
if (base > 7) rex |= REX_B;
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitREX_RB(XmmRegister reg,
|
|
const Operand& operand,
|
|
uint8_t rex) {
|
|
if (reg > 7) rex |= REX_R;
|
|
rex |= operand.rex();
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitREX_RB(XmmRegister reg,
|
|
Register base,
|
|
uint8_t rex) {
|
|
if (reg > 7) rex |= REX_R;
|
|
if (base > 7) rex |= REX_B;
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitREX_RB(Register reg,
|
|
XmmRegister base,
|
|
uint8_t rex) {
|
|
if (reg > 7) rex |= REX_R;
|
|
if (base > 7) rex |= REX_B;
|
|
if (rex != REX_NONE) EmitUint8(REX_PREFIX | rex);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitFixup(AssemblerFixup* fixup) {
|
|
buffer_.EmitFixup(fixup);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitOperandSizeOverride() {
|
|
EmitUint8(0x66);
|
|
}
|
|
|
|
} // namespace dart
|
|
|
|
#endif // VM_ASSEMBLER_X64_H_
|