kmillikin@google.com
3e78b2ad4a
This reapplies SVN r24024 with a bugfix. After OSR compilation, restore the pre-OSR code (which might be already optimized) rather than the unoptimized code (which might have its entry patched). When the optimized code entry is patched it is only safe to call it as a static call, not as an instance call. R=fschneider@google.com Review URL: https://codereview.chromium.org//17233003 git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24088 260f80e4-7a28-3924-810f-c04153c831b5
854 lines
25 KiB
C++
854 lines
25 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#ifndef VM_ASSEMBLER_IA32_H_
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#define VM_ASSEMBLER_IA32_H_
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#ifndef VM_ASSEMBLER_H_
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#error Do not include assembler_ia32.h directly; use assembler.h instead.
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#endif
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#include "platform/assert.h"
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#include "platform/utils.h"
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#include "vm/constants_ia32.h"
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namespace dart {
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// Forward declarations.
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class RuntimeEntry;
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class Immediate : public ValueObject {
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public:
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explicit Immediate(int32_t value) : value_(value) { }
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Immediate(const Immediate& other) : ValueObject(), value_(other.value_) { }
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int32_t value() const { return value_; }
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bool is_int8() const { return Utils::IsInt(8, value_); }
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bool is_uint8() const { return Utils::IsUint(8, value_); }
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bool is_uint16() const { return Utils::IsUint(16, value_); }
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private:
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const int32_t value_;
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// TODO(5411081): Add DISALLOW_COPY_AND_ASSIGN(Immediate) once the mac
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// build issue is resolved.
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// And remove the unnecessary copy constructor.
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};
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class Operand : public ValueObject {
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public:
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uint8_t mod() const {
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return (encoding_at(0) >> 6) & 3;
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}
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Register rm() const {
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return static_cast<Register>(encoding_at(0) & 7);
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}
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ScaleFactor scale() const {
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return static_cast<ScaleFactor>((encoding_at(1) >> 6) & 3);
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}
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Register index() const {
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return static_cast<Register>((encoding_at(1) >> 3) & 7);
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}
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Register base() const {
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return static_cast<Register>(encoding_at(1) & 7);
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}
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int8_t disp8() const {
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ASSERT(length_ >= 2);
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return static_cast<int8_t>(encoding_[length_ - 1]);
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}
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int32_t disp32() const {
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ASSERT(length_ >= 5);
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return bit_copy<int32_t>(encoding_[length_ - 4]);
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}
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Operand(const Operand& other) : ValueObject(), length_(other.length_) {
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memmove(&encoding_[0], &other.encoding_[0], other.length_);
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}
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Operand& operator=(const Operand& other) {
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length_ = other.length_;
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memmove(&encoding_[0], &other.encoding_[0], other.length_);
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return *this;
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}
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bool Equals(const Operand& other) {
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if (length_ != other.length_) return false;
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for (uint8_t i = 0; i < length_; i++) {
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if (encoding_[i] != other.encoding_[i]) return false;
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}
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return true;
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}
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protected:
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Operand() : length_(0) { } // Needed by subclass Address.
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void SetModRM(int mod, Register rm) {
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ASSERT((mod & ~3) == 0);
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encoding_[0] = (mod << 6) | rm;
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length_ = 1;
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}
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void SetSIB(ScaleFactor scale, Register index, Register base) {
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ASSERT(length_ == 1);
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ASSERT((scale & ~3) == 0);
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encoding_[1] = (scale << 6) | (index << 3) | base;
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length_ = 2;
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}
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void SetDisp8(int8_t disp) {
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ASSERT(length_ == 1 || length_ == 2);
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encoding_[length_++] = static_cast<uint8_t>(disp);
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}
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void SetDisp32(int32_t disp) {
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ASSERT(length_ == 1 || length_ == 2);
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int disp_size = sizeof(disp);
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memmove(&encoding_[length_], &disp, disp_size);
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length_ += disp_size;
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}
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private:
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uint8_t length_;
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uint8_t encoding_[6];
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uint8_t padding_;
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explicit Operand(Register reg) { SetModRM(3, reg); }
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// Get the operand encoding byte at the given index.
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uint8_t encoding_at(int index) const {
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ASSERT(index >= 0 && index < length_);
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return encoding_[index];
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}
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// Returns whether or not this operand is really the given register in
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// disguise. Used from the assembler to generate better encodings.
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bool IsRegister(Register reg) const {
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return ((encoding_[0] & 0xF8) == 0xC0) // Addressing mode is register only.
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&& ((encoding_[0] & 0x07) == reg); // Register codes match.
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}
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friend class Assembler;
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};
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class Address : public Operand {
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public:
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Address(Register base, int32_t disp) {
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if (disp == 0 && base != EBP) {
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SetModRM(0, base);
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if (base == ESP) SetSIB(TIMES_1, ESP, base);
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} else if (Utils::IsInt(8, disp)) {
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SetModRM(1, base);
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if (base == ESP) SetSIB(TIMES_1, ESP, base);
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SetDisp8(disp);
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} else {
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SetModRM(2, base);
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if (base == ESP) SetSIB(TIMES_1, ESP, base);
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SetDisp32(disp);
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}
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}
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Address(Register index, ScaleFactor scale, int32_t disp) {
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ASSERT(index != ESP); // Illegal addressing mode.
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SetModRM(0, ESP);
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SetSIB(scale, index, EBP);
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SetDisp32(disp);
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}
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Address(Register base, Register index, ScaleFactor scale, int32_t disp) {
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ASSERT(index != ESP); // Illegal addressing mode.
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if (disp == 0 && base != EBP) {
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SetModRM(0, ESP);
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SetSIB(scale, index, base);
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} else if (Utils::IsInt(8, disp)) {
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SetModRM(1, ESP);
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SetSIB(scale, index, base);
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SetDisp8(disp);
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} else {
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SetModRM(2, ESP);
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SetSIB(scale, index, base);
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SetDisp32(disp);
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}
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}
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Address(const Address& other) : Operand(other) { }
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Address& operator=(const Address& other) {
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Operand::operator=(other);
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return *this;
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}
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static Address Absolute(const uword addr) {
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Address result;
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result.SetModRM(0, EBP);
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result.SetDisp32(addr);
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return result;
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}
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private:
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Address() { } // Needed by Address::Absolute.
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};
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class FieldAddress : public Address {
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public:
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FieldAddress(Register base, int32_t disp)
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: Address(base, disp - kHeapObjectTag) { }
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FieldAddress(Register base, Register index, ScaleFactor scale, int32_t disp)
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: Address(base, index, scale, disp - kHeapObjectTag) { }
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FieldAddress(const FieldAddress& other) : Address(other) { }
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FieldAddress& operator=(const FieldAddress& other) {
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Address::operator=(other);
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return *this;
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}
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};
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class Label : public ValueObject {
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public:
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Label() : position_(0), unresolved_(0) {
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#ifdef DEBUG
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for (int i = 0; i < kMaxUnresolvedBranches; i++) {
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unresolved_near_positions_[i] = -1;
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}
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#endif // DEBUG
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}
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~Label() {
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// Assert if label is being destroyed with unresolved branches pending.
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ASSERT(!IsLinked());
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ASSERT(!HasNear());
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}
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// Returns the position for bound labels. Cannot be used for unused or linked
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// labels.
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int Position() const {
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ASSERT(IsBound());
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return -position_ - kWordSize;
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}
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int LinkPosition() const {
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ASSERT(IsLinked());
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return position_ - kWordSize;
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}
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int NearPosition() {
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ASSERT(HasNear());
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return unresolved_near_positions_[--unresolved_];
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}
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bool IsBound() const { return position_ < 0; }
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bool IsUnused() const { return (position_ == 0) && (unresolved_ == 0); }
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bool IsLinked() const { return position_ > 0; }
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bool HasNear() const { return unresolved_ != 0; }
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private:
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void BindTo(int position) {
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ASSERT(!IsBound());
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ASSERT(!HasNear());
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position_ = -position - kWordSize;
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ASSERT(IsBound());
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}
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void LinkTo(int position) {
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ASSERT(!IsBound());
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position_ = position + kWordSize;
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ASSERT(IsLinked());
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}
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void NearLinkTo(int position) {
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ASSERT(!IsBound());
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ASSERT(unresolved_ < kMaxUnresolvedBranches);
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unresolved_near_positions_[unresolved_++] = position;
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}
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static const int kMaxUnresolvedBranches = 20;
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int position_;
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int unresolved_;
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int unresolved_near_positions_[kMaxUnresolvedBranches];
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friend class Assembler;
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DISALLOW_COPY_AND_ASSIGN(Label);
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};
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class CPUFeatures : public AllStatic {
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public:
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static void InitOnce();
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static bool sse2_supported();
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static bool sse4_1_supported();
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static bool double_truncate_round_supported() { return sse4_1_supported(); }
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private:
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static const uint64_t kSSE2BitMask = static_cast<uint64_t>(1) << 26;
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static const uint64_t kSSE4_1BitMask = static_cast<uint64_t>(1) << 51;
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static bool sse2_supported_;
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static bool sse4_1_supported_;
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#ifdef DEBUG
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static bool initialized_;
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#endif
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};
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class Assembler : public ValueObject {
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public:
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Assembler()
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: buffer_(),
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object_pool_(GrowableObjectArray::Handle()),
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prologue_offset_(-1),
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comments_() { }
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~Assembler() { }
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static const bool kNearJump = true;
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static const bool kFarJump = false;
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/*
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* Emit Machine Instructions.
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*/
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void call(Register reg);
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void call(const Address& address);
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void call(Label* label);
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void call(const ExternalLabel* label);
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static const intptr_t kCallExternalLabelSize = 5;
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void pushl(Register reg);
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void pushl(const Address& address);
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void pushl(const Immediate& imm);
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void popl(Register reg);
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void popl(const Address& address);
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void pushal();
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void popal();
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void setcc(Condition condition, ByteRegister dst);
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void movl(Register dst, const Immediate& src);
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void movl(Register dst, Register src);
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void movl(Register dst, const Address& src);
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void movl(const Address& dst, Register src);
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void movl(const Address& dst, const Immediate& imm);
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void movzxb(Register dst, ByteRegister src);
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void movzxb(Register dst, const Address& src);
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void movsxb(Register dst, ByteRegister src);
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void movsxb(Register dst, const Address& src);
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void movb(Register dst, const Address& src);
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void movb(const Address& dst, ByteRegister src);
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void movb(const Address& dst, const Immediate& imm);
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void movzxw(Register dst, Register src);
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void movzxw(Register dst, const Address& src);
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void movsxw(Register dst, Register src);
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void movsxw(Register dst, const Address& src);
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void movw(Register dst, const Address& src);
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void movw(const Address& dst, Register src);
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void leal(Register dst, const Address& src);
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void cmovs(Register dst, Register src);
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void cmovns(Register dst, Register src);
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void rep_movsb();
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void movss(XmmRegister dst, const Address& src);
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void movss(const Address& dst, XmmRegister src);
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void movss(XmmRegister dst, XmmRegister src);
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void movd(XmmRegister dst, Register src);
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void movd(Register dst, XmmRegister src);
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void movq(const Address& dst, XmmRegister src);
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void movq(XmmRegister dst, const Address& src);
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void addss(XmmRegister dst, XmmRegister src);
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void addss(XmmRegister dst, const Address& src);
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void subss(XmmRegister dst, XmmRegister src);
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void subss(XmmRegister dst, const Address& src);
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void mulss(XmmRegister dst, XmmRegister src);
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void mulss(XmmRegister dst, const Address& src);
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void divss(XmmRegister dst, XmmRegister src);
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void divss(XmmRegister dst, const Address& src);
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void movsd(XmmRegister dst, const Address& src);
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void movsd(const Address& dst, XmmRegister src);
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void movsd(XmmRegister dst, XmmRegister src);
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void movaps(XmmRegister dst, XmmRegister src);
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void movups(XmmRegister dst, const Address& src);
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void movups(const Address& dst, XmmRegister src);
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void addsd(XmmRegister dst, XmmRegister src);
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void addsd(XmmRegister dst, const Address& src);
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void subsd(XmmRegister dst, XmmRegister src);
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void subsd(XmmRegister dst, const Address& src);
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void mulsd(XmmRegister dst, XmmRegister src);
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void mulsd(XmmRegister dst, const Address& src);
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void divsd(XmmRegister dst, XmmRegister src);
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void divsd(XmmRegister dst, const Address& src);
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void addps(XmmRegister dst, XmmRegister src);
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void subps(XmmRegister dst, XmmRegister src);
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void divps(XmmRegister dst, XmmRegister src);
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void mulps(XmmRegister dst, XmmRegister src);
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void minps(XmmRegister dst, XmmRegister src);
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void maxps(XmmRegister dst, XmmRegister src);
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void andps(XmmRegister dst, XmmRegister src);
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void andps(XmmRegister dst, const Address& src);
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void orps(XmmRegister dst, XmmRegister src);
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void notps(XmmRegister dst);
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void negateps(XmmRegister dst);
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void absps(XmmRegister dst);
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void zerowps(XmmRegister dst);
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void cmppseq(XmmRegister dst, XmmRegister src);
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void cmppsneq(XmmRegister dst, XmmRegister src);
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void cmppslt(XmmRegister dst, XmmRegister src);
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void cmppsle(XmmRegister dst, XmmRegister src);
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void cmppsnlt(XmmRegister dst, XmmRegister src);
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void cmppsnle(XmmRegister dst, XmmRegister src);
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void sqrtps(XmmRegister dst);
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void rsqrtps(XmmRegister dst);
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void reciprocalps(XmmRegister dst);
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void set1ps(XmmRegister dst, Register tmp, const Immediate& imm);
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void shufps(XmmRegister dst, XmmRegister src, const Immediate& mask);
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void cvtsi2ss(XmmRegister dst, Register src);
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void cvtsi2sd(XmmRegister dst, Register src);
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void cvtss2si(Register dst, XmmRegister src);
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void cvtss2sd(XmmRegister dst, XmmRegister src);
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void cvtsd2si(Register dst, XmmRegister src);
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void cvtsd2ss(XmmRegister dst, XmmRegister src);
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void cvttss2si(Register dst, XmmRegister src);
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void cvttsd2si(Register dst, XmmRegister src);
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void cvtdq2pd(XmmRegister dst, XmmRegister src);
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void comiss(XmmRegister a, XmmRegister b);
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void comisd(XmmRegister a, XmmRegister b);
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void movmskpd(Register dst, XmmRegister src);
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void movmskps(Register dst, XmmRegister src);
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void sqrtsd(XmmRegister dst, XmmRegister src);
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void sqrtss(XmmRegister dst, XmmRegister src);
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void xorpd(XmmRegister dst, const Address& src);
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void xorpd(XmmRegister dst, XmmRegister src);
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void xorps(XmmRegister dst, const Address& src);
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void xorps(XmmRegister dst, XmmRegister src);
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void andpd(XmmRegister dst, const Address& src);
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void andpd(XmmRegister dst, XmmRegister src);
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void orpd(XmmRegister dst, XmmRegister src);
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void pextrd(Register dst, XmmRegister src, const Immediate& imm);
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void pmovsxdq(XmmRegister dst, XmmRegister src);
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void pcmpeqq(XmmRegister dst, XmmRegister src);
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void pxor(XmmRegister dst, XmmRegister src);
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enum RoundingMode {
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kRoundToNearest = 0x0,
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kRoundDown = 0x1,
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kRoundUp = 0x2,
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kRoundToZero = 0x3
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};
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void roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode);
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void flds(const Address& src);
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void fstps(const Address& dst);
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void fldl(const Address& src);
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void fstpl(const Address& dst);
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void fnstcw(const Address& dst);
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void fldcw(const Address& src);
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void fistpl(const Address& dst);
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void fistps(const Address& dst);
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void fildl(const Address& src);
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void filds(const Address& src);
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void fincstp();
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void ffree(intptr_t value);
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void fsin();
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void fcos();
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void fptan();
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void xchgl(Register dst, Register src);
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void cmpl(Register reg, const Immediate& imm);
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void cmpl(Register reg0, Register reg1);
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void cmpl(Register reg, const Address& address);
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void cmpl(const Address& address, Register reg);
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void cmpl(const Address& address, const Immediate& imm);
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void testl(Register reg1, Register reg2);
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void testl(Register reg, const Immediate& imm);
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void andl(Register dst, const Immediate& imm);
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void andl(Register dst, Register src);
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void andl(Register dst, const Address& address);
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void orl(Register dst, const Immediate& imm);
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void orl(Register dst, Register src);
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void orl(Register dst, const Address& address);
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void xorl(Register dst, const Immediate& imm);
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void xorl(Register dst, Register src);
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void xorl(Register dst, const Address& address);
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void addl(Register dst, Register src);
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void addl(Register reg, const Immediate& imm);
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void addl(Register reg, const Address& address);
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void addl(const Address& address, Register reg);
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void addl(const Address& address, const Immediate& imm);
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void adcl(Register dst, Register src);
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void adcl(Register reg, const Immediate& imm);
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void adcl(Register dst, const Address& address);
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void adcl(const Address& dst, Register src);
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void subl(Register dst, Register src);
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void subl(Register reg, const Immediate& imm);
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void subl(Register reg, const Address& address);
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void subl(const Address& address, Register reg);
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void cdq();
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void idivl(Register reg);
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void imull(Register dst, Register src);
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void imull(Register reg, const Immediate& imm);
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void imull(Register reg, const Address& address);
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void imull(Register reg);
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void imull(const Address& address);
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void mull(Register reg);
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void mull(const Address& address);
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void sbbl(Register dst, Register src);
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void sbbl(Register reg, const Immediate& imm);
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void sbbl(Register reg, const Address& address);
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void sbbl(const Address& address, Register reg);
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void incl(Register reg);
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void incl(const Address& address);
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void decl(Register reg);
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void decl(const Address& address);
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void shll(Register reg, const Immediate& imm);
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void shll(Register operand, Register shifter);
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void shll(const Address& operand, Register shifter);
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void shrl(Register reg, const Immediate& imm);
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void shrl(Register operand, Register shifter);
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void sarl(Register reg, const Immediate& imm);
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void sarl(Register operand, Register shifter);
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void sarl(const Address& address, Register shifter);
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void shld(Register dst, Register src);
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void shld(const Address& operand, Register src);
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void shrd(Register dst, Register src);
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void shrd(const Address& dst, Register src);
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void negl(Register reg);
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void notl(Register reg);
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void enter(const Immediate& imm);
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void leave();
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void ret();
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void ret(const Immediate& imm);
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// 'size' indicates size in bytes and must be in the range 1..8.
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void nop(int size = 1);
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void int3();
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void hlt();
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void j(Condition condition, Label* label, bool near = kFarJump);
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void j(Condition condition, const ExternalLabel* label);
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void jmp(Register reg);
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void jmp(Label* label, bool near = kFarJump);
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void jmp(const ExternalLabel* label);
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void lock();
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void cmpxchgl(const Address& address, Register reg);
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void cpuid();
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/*
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* Macros for High-level operations and implemented on all architectures.
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*/
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void CompareRegisters(Register a, Register b);
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// Issues a move instruction if 'to' is not the same as 'from'.
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void MoveRegister(Register to, Register from);
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void PopRegister(Register r);
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void AddImmediate(Register reg, const Immediate& imm);
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void Drop(intptr_t stack_elements);
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void LoadObject(Register dst, const Object& object);
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void PushObject(const Object& object);
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void CompareObject(Register reg, const Object& object);
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void LoadDoubleConstant(XmmRegister dst, double value);
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void StoreIntoObject(Register object, // Object we are storing into.
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const Address& dest, // Where we are storing into.
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Register value, // Value we are storing.
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bool can_value_be_smi = true);
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void StoreIntoObjectNoBarrier(Register object,
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const Address& dest,
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Register value);
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void StoreIntoObjectNoBarrier(Register object,
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const Address& dest,
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const Object& value);
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void DoubleNegate(XmmRegister d);
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void FloatNegate(XmmRegister f);
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void DoubleAbs(XmmRegister reg);
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void LockCmpxchgl(const Address& address, Register reg) {
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lock();
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cmpxchgl(address, reg);
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}
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void EnterFrame(intptr_t frame_space);
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void LeaveFrame();
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void ReserveAlignedFrameSpace(intptr_t frame_space);
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// Create a frame for calling into runtime that preserves all volatile
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// registers. Frame's RSP is guaranteed to be correctly aligned and
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// frame_space bytes are reserved under it.
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void EnterCallRuntimeFrame(intptr_t frame_space);
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void LeaveCallRuntimeFrame();
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void CallRuntime(const RuntimeEntry& entry);
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/*
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* Loading and comparing classes of objects.
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*/
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void LoadClassId(Register result, Register object);
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void LoadClassById(Register result, Register class_id);
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void LoadClass(Register result, Register object, Register scratch);
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void CompareClassId(Register object, intptr_t class_id, Register scratch);
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/*
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* Misc. functionality
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*/
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void SmiTag(Register reg) {
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addl(reg, reg);
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}
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void SmiUntag(Register reg) {
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sarl(reg, Immediate(kSmiTagSize));
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}
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int PreferredLoopAlignment() { return 16; }
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void Align(int alignment, int offset);
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void Bind(Label* label);
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int CodeSize() const { return buffer_.Size(); }
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int prologue_offset() const { return prologue_offset_; }
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const ZoneGrowableArray<int>& GetPointerOffsets() const {
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return buffer_.pointer_offsets();
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}
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const GrowableObjectArray& object_pool() const { return object_pool_; }
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void FinalizeInstructions(const MemoryRegion& region) {
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buffer_.FinalizeInstructions(region);
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}
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// Set up a Dart frame on entry with a frame pointer and PC information to
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// enable easy access to the RawInstruction object of code corresponding
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// to this frame.
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// The dart frame layout is as follows:
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// ....
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// ret PC
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// saved EBP <=== EBP
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// pc (used to derive the RawInstruction Object of the dart code)
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// locals space <=== ESP
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// .....
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// This code sets this up with the sequence:
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// pushl ebp
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// movl ebp, esp
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// call L
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// L: <code to adjust saved pc if there is any intrinsification code>
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// .....
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void EnterDartFrame(intptr_t frame_size);
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// Set up a Dart frame for a function compiled for on-stack replacement.
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// The frame layout is a normal Dart frame, but the frame is partially set
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// up on entry (it is the frame of the unoptimized code).
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void EnterOsrFrame(intptr_t extra_size);
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|
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// Set up a stub frame so that the stack traversal code can easily identify
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// a stub frame.
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// The stub frame layout is as follows:
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// ....
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// ret PC
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// saved EBP
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// 0 (used to indicate frame is a stub frame)
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// .....
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// This code sets this up with the sequence:
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// pushl ebp
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// movl ebp, esp
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// pushl immediate(0)
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// .....
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void EnterStubFrame();
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// Instruction pattern from entrypoint is used in dart frame prologs
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// to set up the frame and save a PC which can be used to figure out the
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// RawInstruction object corresponding to the code running in the frame.
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// entrypoint:
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// pushl ebp (size is 1 byte)
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// movl ebp, esp (size is 2 bytes)
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// call L (size is 5 bytes)
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// L:
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static const intptr_t kEntryPointToPcMarkerOffset = 8;
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|
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// Inlined allocation of an instance of class 'cls', code has no runtime
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// calls. Jump to 'failure' if the instance cannot be allocated here.
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|
// Allocated instance is returned in 'instance_reg'.
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// Only the tags field of the object is initialized.
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void TryAllocate(const Class& cls,
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Label* failure,
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|
bool near_jump,
|
|
Register instance_reg);
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|
|
// Debugging and bringup support.
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|
void Stop(const char* message);
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|
void Unimplemented(const char* message);
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void Untested(const char* message);
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void Unreachable(const char* message);
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|
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static void InitializeMemoryWithBreakpoints(uword data, int length);
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|
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void Comment(const char* format, ...) PRINTF_ATTRIBUTE(2, 3);
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const Code::Comments& GetCodeComments() const;
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|
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static const char* RegisterName(Register reg);
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|
static const char* FpuRegisterName(FpuRegister reg);
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private:
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AssemblerBuffer buffer_;
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GrowableObjectArray& object_pool_; // Object pool is not used on ia32.
|
|
int prologue_offset_;
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|
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class CodeComment : public ZoneAllocated {
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public:
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CodeComment(intptr_t pc_offset, const String& comment)
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|
: pc_offset_(pc_offset), comment_(comment) { }
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|
|
intptr_t pc_offset() const { return pc_offset_; }
|
|
const String& comment() const { return comment_; }
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|
|
private:
|
|
intptr_t pc_offset_;
|
|
const String& comment_;
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|
|
|
DISALLOW_COPY_AND_ASSIGN(CodeComment);
|
|
};
|
|
|
|
GrowableArray<CodeComment*> comments_;
|
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|
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inline void EmitUint8(uint8_t value);
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|
inline void EmitInt32(int32_t value);
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|
inline void EmitRegisterOperand(int rm, int reg);
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|
inline void EmitXmmRegisterOperand(int rm, XmmRegister reg);
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|
inline void EmitFixup(AssemblerFixup* fixup);
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|
inline void EmitOperandSizeOverride();
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|
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void EmitOperand(int rm, const Operand& operand);
|
|
void EmitImmediate(const Immediate& imm);
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|
void EmitComplex(int rm, const Operand& operand, const Immediate& immediate);
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|
void EmitLabel(Label* label, int instruction_size);
|
|
void EmitLabelLink(Label* label);
|
|
void EmitNearLabelLink(Label* label);
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|
|
void EmitGenericShift(int rm, Register reg, const Immediate& imm);
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|
void EmitGenericShift(int rm, const Operand& operand, Register shifter);
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|
|
|
void StoreIntoObjectFilter(Register object, Register value, Label* no_update);
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|
|
|
// Shorter filtering sequence that assumes that value is not a smi.
|
|
void StoreIntoObjectFilterNoSmi(Register object,
|
|
Register value,
|
|
Label* no_update);
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|
|
|
DISALLOW_ALLOCATION();
|
|
DISALLOW_COPY_AND_ASSIGN(Assembler);
|
|
};
|
|
|
|
|
|
inline void Assembler::EmitUint8(uint8_t value) {
|
|
buffer_.Emit<uint8_t>(value);
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|
}
|
|
|
|
|
|
inline void Assembler::EmitInt32(int32_t value) {
|
|
buffer_.Emit<int32_t>(value);
|
|
}
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|
|
|
|
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inline void Assembler::EmitRegisterOperand(int rm, int reg) {
|
|
ASSERT(rm >= 0 && rm < 8);
|
|
buffer_.Emit<uint8_t>(0xC0 + (rm << 3) + reg);
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|
}
|
|
|
|
|
|
inline void Assembler::EmitXmmRegisterOperand(int rm, XmmRegister reg) {
|
|
EmitRegisterOperand(rm, static_cast<Register>(reg));
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitFixup(AssemblerFixup* fixup) {
|
|
buffer_.EmitFixup(fixup);
|
|
}
|
|
|
|
|
|
inline void Assembler::EmitOperandSizeOverride() {
|
|
EmitUint8(0x66);
|
|
}
|
|
|
|
} // namespace dart
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|
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#endif // VM_ASSEMBLER_IA32_H_
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