Regis Crelier
6219753e18
depend on the current rounding mode (fixes issue 25900). Add support for TRUNC.W in assembler, disassembler, and simulator. Fix disassembler to understand CVT.S. Remove unused instructions. Update co19 status file. R=rmacnak@google.com Review URL: https://codereview.chromium.org/1765623002 .
796 lines
19 KiB
C++
796 lines
19 KiB
C++
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#include "vm/disassembler.h"
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#include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS.
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#if defined(TARGET_ARCH_MIPS)
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#include "platform/assert.h"
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namespace dart {
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#ifndef PRODUCT
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class MIPSDecoder : public ValueObject {
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public:
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MIPSDecoder(char* buffer, size_t buffer_size)
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: buffer_(buffer),
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buffer_size_(buffer_size),
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buffer_pos_(0) {
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buffer_[buffer_pos_] = '\0';
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}
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~MIPSDecoder() {}
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// Writes one disassembled instruction into 'buffer' (0-terminated).
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// Returns true if the instruction was successfully decoded, false otherwise.
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void InstructionDecode(Instr* instr);
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private:
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// Bottleneck functions to print into the out_buffer.
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void Print(const char* str);
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// Printing of common values.
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void PrintRegister(Register reg);
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void PrintFRegister(FRegister reg);
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void PrintFormat(Instr* instr);
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int FormatRegister(Instr* instr, const char* format);
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int FormatFRegister(Instr* instr, const char* format);
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int FormatOption(Instr* instr, const char* format);
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void Format(Instr* instr, const char* format);
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void Unknown(Instr* instr);
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void DecodeSpecial(Instr* instr);
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void DecodeSpecial2(Instr* instr);
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void DecodeRegImm(Instr* instr);
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void DecodeCop1(Instr* instr);
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// Convenience functions.
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char* get_buffer() const { return buffer_; }
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char* current_position_in_buffer() { return buffer_ + buffer_pos_; }
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size_t remaining_size_in_buffer() { return buffer_size_ - buffer_pos_; }
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char* buffer_; // Decode instructions into this buffer.
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size_t buffer_size_; // The size of the character buffer.
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size_t buffer_pos_; // Current character position in buffer.
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DISALLOW_ALLOCATION();
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DISALLOW_COPY_AND_ASSIGN(MIPSDecoder);
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};
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// Support for assertions in the MIPSDecoder formatting functions.
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#define STRING_STARTS_WITH(string, compare_string) \
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(strncmp(string, compare_string, strlen(compare_string)) == 0)
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// Append the str to the output buffer.
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void MIPSDecoder::Print(const char* str) {
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char cur = *str++;
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while (cur != '\0' && (buffer_pos_ < (buffer_size_ - 1))) {
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buffer_[buffer_pos_++] = cur;
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cur = *str++;
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}
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buffer_[buffer_pos_] = '\0';
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}
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static const char* reg_names[kNumberOfCpuRegisters] = {
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"r0" , "r1" , "r2" , "r3" , "r4" , "r5" , "r6" , "r7" ,
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"r8" , "r9" , "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
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};
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static const char* freg_names[kNumberOfFRegisters] = {
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"f0" , "f1" , "f2" , "f3" , "f4" , "f5" , "f6" , "f7" ,
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"f8" , "f9" , "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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};
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void MIPSDecoder::PrintRegister(Register reg) {
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ASSERT(0 <= reg);
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ASSERT(reg < kNumberOfCpuRegisters);
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Print(reg_names[reg]);
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}
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void MIPSDecoder::PrintFRegister(FRegister reg) {
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ASSERT(0 <= reg);
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ASSERT(reg < kNumberOfFRegisters);
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Print(freg_names[reg]);
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}
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// Handle all register based formatting in these functions to reduce the
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// complexity of FormatOption.
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int MIPSDecoder::FormatRegister(Instr* instr, const char* format) {
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ASSERT(format[0] == 'r');
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switch (format[1]) {
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case 's': { // 'rs: Rs register
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PrintRegister(instr->RsField());
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return 2;
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}
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case 't': { // 'rt: Rt register
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PrintRegister(instr->RtField());
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return 2;
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}
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case 'd': { // 'rd: Rd register
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PrintRegister(instr->RdField());
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return 2;
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}
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}
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UNREACHABLE();
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return -1;
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}
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int MIPSDecoder::FormatFRegister(Instr* instr, const char* format) {
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ASSERT(format[0] == 'f');
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switch (format[1]) {
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case 's': { // 'fs: Fs register
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PrintFRegister(instr->FsField());
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return 2;
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}
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case 't': { // 'ft: Ft register
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PrintFRegister(instr->FtField());
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return 2;
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}
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case 'd': { // 'fd: Fd register
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PrintFRegister(instr->FdField());
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return 2;
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}
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}
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UNREACHABLE();
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return -1;
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}
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void MIPSDecoder::PrintFormat(Instr *instr) {
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switch (instr->FormatField()) {
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case FMT_S: {
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Print("s");
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break;
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}
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case FMT_D: {
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Print("d");
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break;
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}
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case FMT_W: {
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Print("w");
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break;
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}
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case FMT_L: {
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Print("l");
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break;
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}
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case FMT_PS: {
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Print("ps");
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break;
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}
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default: {
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Print("unknown");
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break;
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}
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}
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}
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// FormatOption takes a formatting string and interprets it based on
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// the current instructions. The format string points to the first
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// character of the option string (the option escape has already been
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// consumed by the caller.) FormatOption returns the number of
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// characters that were consumed from the formatting string.
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int MIPSDecoder::FormatOption(Instr* instr, const char* format) {
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switch (format[0]) {
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case 'c': {
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ASSERT(STRING_STARTS_WITH(format, "code"));
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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"0x%x",
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instr->BreakCodeField());
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return 4;
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}
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case 'h': {
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ASSERT(STRING_STARTS_WITH(format, "hint"));
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if (instr->SaField() == 0x10) {
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// The high bit of the SA field is the only one that means something for
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// JALR and JR. TODO(zra): Fill in the other cases for PREF if needed.
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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".hb");
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} else if (instr->SaField() != 0) {
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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".unknown");
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}
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return 4;
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}
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case 'd': {
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ASSERT(STRING_STARTS_WITH(format, "dest"));
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int off = instr->SImmField() << 2;
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uword destination =
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reinterpret_cast<uword>(instr) + off + Instr::kInstrSize;
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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"%#" Px "",
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destination);
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return 4;
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}
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case 'i': {
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ASSERT(STRING_STARTS_WITH(format, "imm"));
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if (format[3] == 'u') {
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int32_t imm = instr->UImmField();
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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"0x%x",
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imm);
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} else {
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ASSERT(STRING_STARTS_WITH(format, "imms"));
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int32_t imm = instr->SImmField();
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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"%d",
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imm);
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}
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return 4;
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}
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case 'r': {
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return FormatRegister(instr, format);
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}
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case 'f': {
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if (format[1] == 'm') {
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ASSERT(STRING_STARTS_WITH(format, "fmt"));
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PrintFormat(instr);
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return 3;
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} else {
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return FormatFRegister(instr, format);
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}
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}
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case 's': {
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ASSERT(STRING_STARTS_WITH(format, "sa"));
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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"%d",
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instr->SaField());
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return 2;
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}
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default: {
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UNREACHABLE();
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}
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}
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UNREACHABLE();
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return -1;
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}
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// Format takes a formatting string for a whole instruction and prints it into
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// the output buffer. All escaped options are handed to FormatOption to be
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// parsed further.
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void MIPSDecoder::Format(Instr* instr, const char* format) {
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char cur = *format++;
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while ((cur != 0) && (buffer_pos_ < (buffer_size_ - 1))) {
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if (cur == '\'') { // Single quote is used as the formatting escape.
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format += FormatOption(instr, format);
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} else {
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buffer_[buffer_pos_++] = cur;
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}
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cur = *format++;
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}
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buffer_[buffer_pos_] = '\0';
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}
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// For currently unimplemented decodings the disassembler calls Unknown(instr)
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// which will just print "unknown" of the instruction bits.
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void MIPSDecoder::Unknown(Instr* instr) {
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Format(instr, "unknown");
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}
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void MIPSDecoder::DecodeSpecial(Instr* instr) {
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ASSERT(instr->OpcodeField() == SPECIAL);
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switch (instr->FunctionField()) {
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case ADDU: {
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Format(instr, "addu 'rd, 'rs, 'rt");
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break;
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}
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case AND: {
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Format(instr, "and 'rd, 'rs, 'rt");
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break;
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}
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case BREAK: {
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Format(instr, "break 'code");
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if (instr->BreakCodeField() == Instr::kStopMessageCode) {
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const char* message = *reinterpret_cast<const char**>(
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reinterpret_cast<intptr_t>(instr) - Instr::kInstrSize);
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buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
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remaining_size_in_buffer(),
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" ; \"%s\"",
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message);
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}
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break;
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}
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case DIV: {
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Format(instr, "div 'rs, 'rt");
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break;
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}
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case DIVU: {
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Format(instr, "divu 'rs, 'rt");
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break;
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}
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case JALR: {
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Format(instr, "jalr'hint 'rd, 'rs");
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break;
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}
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case JR: {
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Format(instr, "jr'hint 'rs");
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break;
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}
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case MFHI: {
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Format(instr, "mfhi 'rd");
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break;
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}
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case MFLO: {
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Format(instr, "mflo 'rd");
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break;
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}
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case MOVCI: {
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if (instr->Bit(16)) {
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Format(instr, "movt 'rd, 'rs");
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} else {
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Format(instr, "movf 'rd, 'rs");
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}
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break;
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}
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case MOVN: {
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Format(instr, "movn 'rd, 'rs, 'rt");
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break;
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}
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case MOVZ: {
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Format(instr, "movz 'rd, 'rs, 'rt");
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break;
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}
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case MTHI: {
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Format(instr, "mthi 'rs");
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break;
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}
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case MTLO: {
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Format(instr, "mtlo 'rs");
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break;
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}
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case MULT: {
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Format(instr, "mult 'rs, 'rt");
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break;
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}
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case MULTU: {
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Format(instr, "multu 'rs, 'rt");
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break;
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}
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case NOR: {
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Format(instr, "nor 'rd, 'rs, 'rt");
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break;
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}
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case OR: {
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if (instr->RsField() == 0 && instr->RtField() == 0) {
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Format(instr, "mov 'rd, 0");
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} else if (instr->RsField() == R0) {
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Format(instr, "mov 'rd, 'rt");
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} else if (instr->RtField() == R0) {
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Format(instr, "mov 'rd, 'rs");
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} else {
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Format(instr, "or 'rd, 'rs, 'rt");
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}
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break;
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}
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case SLL: {
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if ((instr->RdField() == R0) &&
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(instr->RtField() == R0) &&
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(instr->SaField() == 0)) {
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Format(instr, "nop");
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} else {
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Format(instr, "sll 'rd, 'rt, 'sa");
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}
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break;
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}
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case SLLV: {
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Format(instr, "sllv 'rd, 'rt, 'rs");
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break;
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}
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case SLT: {
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Format(instr, "slt 'rd, 'rs, 'rt");
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break;
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}
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case SLTU: {
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Format(instr, "sltu 'rd, 'rs, 'rt");
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break;
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}
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case SRA: {
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if (instr->RsField() == 0) {
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Format(instr, "sra 'rd, 'rt, 'sa");
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} else {
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Unknown(instr);
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}
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break;
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}
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case SRAV: {
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Format(instr, "srav 'rd, 'rt, 'rs");
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break;
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}
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case SRL: {
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if (instr->RsField() == 0) {
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Format(instr, "srl 'rd, 'rt, 'sa");
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} else {
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Unknown(instr);
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}
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break;
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}
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case SRLV: {
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if (instr->SaField() == 0) {
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Format(instr, "srlv 'rd, 'rt, 'rs");
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} else {
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Unknown(instr);
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}
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break;
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}
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case SUBU: {
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Format(instr, "subu 'rd, 'rs, 'rt");
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break;
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}
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case XOR: {
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Format(instr, "xor 'rd, 'rs, 'rt");
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break;
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}
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default: {
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Unknown(instr);
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break;
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}
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}
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}
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void MIPSDecoder::DecodeSpecial2(Instr* instr) {
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ASSERT(instr->OpcodeField() == SPECIAL2);
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switch (instr->FunctionField()) {
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case MADD: {
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Format(instr, "madd 'rs, 'rt");
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break;
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}
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case MADDU: {
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Format(instr, "maddu 'rs, 'rt");
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break;
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}
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case CLO: {
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Format(instr, "clo 'rd, 'rs");
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break;
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}
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case CLZ: {
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Format(instr, "clz 'rd, 'rs");
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break;
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}
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default: {
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Unknown(instr);
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break;
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}
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}
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}
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void MIPSDecoder::DecodeRegImm(Instr* instr) {
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ASSERT(instr->OpcodeField() == REGIMM);
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switch (instr->RegImmFnField()) {
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case BGEZ: {
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Format(instr, "bgez 'rs, 'dest");
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break;
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}
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case BGEZAL: {
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Format(instr, "bgezal 'rs, 'dest");
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break;
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}
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case BLTZAL: {
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Format(instr, "bltzal 'rs, 'dest");
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break;
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}
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case BGEZL: {
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Format(instr, "bgezl 'rs, 'dest");
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break;
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}
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case BLTZ: {
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Format(instr, "bltz 'rs, 'dest");
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break;
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}
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case BLTZL: {
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Format(instr, "bltzl 'rs, 'dest");
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break;
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}
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default: {
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Unknown(instr);
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break;
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}
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}
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}
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void MIPSDecoder::DecodeCop1(Instr* instr) {
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ASSERT(instr->OpcodeField() == COP1);
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if (instr->HasFormat()) {
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// If the rs field is a valid format, then the function field identifies
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// the instruction.
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switch (instr->Cop1FunctionField()) {
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case COP1_ADD: {
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Format(instr, "add.'fmt 'fd, 'fs, 'ft");
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break;
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}
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case COP1_SUB: {
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Format(instr, "sub.'fmt 'fd, 'fs, 'ft");
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break;
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}
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case COP1_MUL: {
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Format(instr, "mul.'fmt 'fd, 'fs, 'ft");
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break;
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}
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case COP1_DIV: {
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Format(instr, "div.'fmt 'fd, 'fs, 'ft");
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break;
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}
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case COP1_SQRT: {
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Format(instr, "sqrt.'fmt 'fd, 'fs");
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break;
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}
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case COP1_MOV: {
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Format(instr, "mov.'fmt 'fd, 'fs");
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break;
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}
|
|
case COP1_NEG: {
|
|
Format(instr, "neg.'fmt 'fd, 'fs");
|
|
break;
|
|
}
|
|
case COP1_C_F: {
|
|
Format(instr, "c.f.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_UN: {
|
|
Format(instr, "c.un.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_EQ: {
|
|
Format(instr, "c.eq.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_UEQ: {
|
|
Format(instr, "c.ueq.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_OLT: {
|
|
Format(instr, "c.olt.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_ULT: {
|
|
Format(instr, "c.ult.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_OLE: {
|
|
Format(instr, "c.ole.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_C_ULE: {
|
|
Format(instr, "c.ule.'fmt 'fs, 'ft");
|
|
break;
|
|
}
|
|
case COP1_TRUNC_W: {
|
|
Format(instr, "trunc.w.'fmt 'fd, 'fs");
|
|
break;
|
|
}
|
|
case COP1_CVT_S: {
|
|
Format(instr, "cvt.s.'fmt 'fd, 'fs");
|
|
break;
|
|
}
|
|
case COP1_CVT_D: {
|
|
Format(instr, "cvt.d.'fmt 'fd, 'fs");
|
|
break;
|
|
}
|
|
default: {
|
|
Unknown(instr);
|
|
break;
|
|
}
|
|
}
|
|
} else {
|
|
// If the rs field isn't a valid format, then it must be a sub-opcode.
|
|
switch (instr->Cop1SubField()) {
|
|
case COP1_MF: {
|
|
if (instr->Bits(0, 11) != 0) {
|
|
Unknown(instr);
|
|
} else {
|
|
Format(instr, "mfc1 'rt, 'fs");
|
|
}
|
|
break;
|
|
}
|
|
case COP1_MT: {
|
|
if (instr->Bits(0, 11) != 0) {
|
|
Unknown(instr);
|
|
} else {
|
|
Format(instr, "mtc1 'rt, 'fs");
|
|
}
|
|
break;
|
|
}
|
|
case COP1_BC: {
|
|
ASSERT(instr->Bit(17) == 0);
|
|
if (instr->Bit(16) == 1) { // Branch on true.
|
|
Format(instr, "bc1t 'dest");
|
|
} else { // Branch on false.
|
|
Format(instr, "bc1f 'dest");
|
|
}
|
|
break;
|
|
}
|
|
default: {
|
|
Unknown(instr);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void MIPSDecoder::InstructionDecode(Instr* instr) {
|
|
switch (instr->OpcodeField()) {
|
|
case SPECIAL: {
|
|
DecodeSpecial(instr);
|
|
break;
|
|
}
|
|
case SPECIAL2: {
|
|
DecodeSpecial2(instr);
|
|
break;
|
|
}
|
|
case REGIMM: {
|
|
DecodeRegImm(instr);
|
|
break;
|
|
}
|
|
case COP1: {
|
|
DecodeCop1(instr);
|
|
break;
|
|
}
|
|
case ADDIU: {
|
|
Format(instr, "addiu 'rt, 'rs, 'imms");
|
|
break;
|
|
}
|
|
case ANDI: {
|
|
Format(instr, "andi 'rt, 'rs, 'immu");
|
|
break;
|
|
}
|
|
case BEQ: {
|
|
Format(instr, "beq 'rs, 'rt, 'dest");
|
|
break;
|
|
}
|
|
case BEQL: {
|
|
Format(instr, "beql 'rs, 'rt, 'dest");
|
|
break;
|
|
}
|
|
case BGTZ: {
|
|
Format(instr, "bgtz 'rs, 'dest");
|
|
break;
|
|
}
|
|
case BGTZL: {
|
|
Format(instr, "bgtzl 'rs, 'dest");
|
|
break;
|
|
}
|
|
case BLEZ: {
|
|
Format(instr, "blez 'rs, 'dest");
|
|
break;
|
|
}
|
|
case BLEZL: {
|
|
Format(instr, "blezl 'rs, 'dest");
|
|
break;
|
|
}
|
|
case BNE: {
|
|
Format(instr, "bne 'rs, 'rt, 'dest");
|
|
break;
|
|
}
|
|
case BNEL: {
|
|
Format(instr, "bnel 'rs, 'rt, 'dest");
|
|
break;
|
|
}
|
|
case LB: {
|
|
Format(instr, "lb 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LBU: {
|
|
Format(instr, "lbu 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LDC1: {
|
|
Format(instr, "ldc1 'ft, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LH: {
|
|
Format(instr, "lh 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LHU: {
|
|
Format(instr, "lhu 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LUI: {
|
|
Format(instr, "lui 'rt, 'immu");
|
|
break;
|
|
}
|
|
case LL: {
|
|
Format(instr, "ll 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LW: {
|
|
Format(instr, "lw 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case LWC1: {
|
|
Format(instr, "lwc1 'ft, 'imms('rs)");
|
|
break;
|
|
}
|
|
case ORI: {
|
|
Format(instr, "ori 'rt, 'rs, 'immu");
|
|
break;
|
|
}
|
|
case SB: {
|
|
Format(instr, "sb 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case SC: {
|
|
Format(instr, "sc 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case SLTI: {
|
|
Format(instr, "slti 'rt, 'rs, 'imms");
|
|
break;
|
|
}
|
|
case SLTIU: {
|
|
Format(instr, "sltiu 'rt, 'rs, 'imms");
|
|
break;
|
|
}
|
|
case SH: {
|
|
Format(instr, "sh 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case SDC1: {
|
|
Format(instr, "sdc1 'ft, 'imms('rs)");
|
|
break;
|
|
}
|
|
case SW: {
|
|
Format(instr, "sw 'rt, 'imms('rs)");
|
|
break;
|
|
}
|
|
case SWC1: {
|
|
Format(instr, "swc1 'ft, 'imms('rs)");
|
|
break;
|
|
}
|
|
case XORI: {
|
|
Format(instr, "xori 'rt, 'rs, 'immu");
|
|
break;
|
|
}
|
|
default: {
|
|
Unknown(instr);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void Disassembler::DecodeInstruction(char* hex_buffer, intptr_t hex_size,
|
|
char* human_buffer, intptr_t human_size,
|
|
int* out_instr_len, uword pc) {
|
|
MIPSDecoder decoder(human_buffer, human_size);
|
|
Instr* instr = Instr::At(pc);
|
|
decoder.InstructionDecode(instr);
|
|
OS::SNPrint(hex_buffer, hex_size, "%08x", instr->InstructionBits());
|
|
if (out_instr_len) {
|
|
*out_instr_len = Instr::kInstrSize;
|
|
}
|
|
}
|
|
|
|
#endif // !PRODUCT
|
|
|
|
} // namespace dart
|
|
|
|
#endif // defined TARGET_ARCH_MIPS
|