This CL adds the result register used for subtype test cache stubs to
TypeTestABI. This avoids the hardcoding of the register per-architecture
and allows GenerateCallSubtypeTestStub to be unified into a single
implementation for non-IA32 architectures.
Since the register arguments to GenerateCallSubtypeTestStub were always
either kNoRegister or the same TypeTestABI register across all calls,
those arguments are removed and the appropriate TypeTestABI registers
are considered hardcoded input registers and either implicitly (for
non-IA32) or explicitly (via the stack on IA32) passed to the subtype
tests cache stub being called.
TEST=Tested using our existing test cases, running debug (if available)
or release (if no debug available) trybots for all architectures.
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-x64-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try
Change-Id: Id046f033022398547476fe6cd68920547ec407f3
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/170095
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Tess Strickland
cd7d31950e