Ryan Macnak
61fff77154
TEST=ci, local qemu Change-Id: I9518049ca927fa42d3c04e9e045c6cec1342c789 Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/462462 Reviewed-by: Alexander Aprelev <aam@google.com> Commit-Queue: Ryan Macnak <rmacnak@google.com>
56 lines
2.3 KiB
C++
56 lines
2.3 KiB
C++
// Copyright (c) 2017, the Dart project authors. Please see the AUTHORS file
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// for details. All rights reserved. Use of this source code is governed by a
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// BSD-style license that can be found in the LICENSE file.
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#include "platform/globals.h" // NOLINT
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#if defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
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#include "vm/constants.h" // NOLINT
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namespace dart {
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const char* const cpu_reg_names[kNumberOfCpuRegisters] = {
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"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "fp", "thr", "a0",
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"a1", "a2", "tmp", "tmp2", "pp", "a6", "a7", "s2", "s3", "s4", "s5",
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"s6", "s7", "s8", "s9", "null", "wbs", "t3", "t4", "t5", "t6",
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};
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const char* const cpu_reg_abi_names[kNumberOfCpuRegisters] = {
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"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0", "s1", "a0",
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"a1", "a2", "a3", "a4", "a5", "a6", "a7", "s2", "s3", "s4", "s5",
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"s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6",
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};
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const char* const fpu_reg_names[kNumberOfFpuRegisters] = {
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"ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7",
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"fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
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"fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
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"fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11",
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};
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const char* const vector_reg_names[kNumberOfVectorRegisters] = {
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"v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
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"v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
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"v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
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};
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const Register CallingConventions::ArgumentRegisters[] = {
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// A3/A4/A5 are assigned to TMP/TMP2/PP. This assignment is important for
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// reducing code size. To minimize distruption to the rest of the compiler,
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// we tell the register allocator and marshaller use T3/T4/T5 for FFI calls,
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// so they can make use of general moves that assume the availability of
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// TMP/TMP2/PP, and only move them to A3/A4/A5 at the last momement in
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// FfiCallInstr and CCallInstr (and NativeEntryInstr in the opposite
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// direction).
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A0, A1, A2, T3, T4, T5, A6, A7,
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};
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const FpuRegister CallingConventions::FpuArgumentRegisters[] = {
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FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7,
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};
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} // namespace dart
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#endif // defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
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