When generating code for deferred units compiler
can't emit PC relative call to the shared Mint allocation
stub. This causes compiler to emit an indirect call
through a Code object. Such calls clobber CODE_REG
which is actually an allocatable register.
Fix this by using non-allocatable register instead of
CODE_REG when generating indirect calls through
Code object in AOT mode. Callees don't expect
anything useful in CODE_REG anyway because AOT
calling convetion does not use it.
TEST=vm/cc/{BranchLinkPreservesRegisters,JumpAndLinkPreservesRegisters,CallCodePreservesRegisters}
Bug: b/242559057
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Change-Id: Ib1fdc1c104d0269d41bb1ab9cbe292ad28c7cd49
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/338127
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Slava Egorov <vegorov@google.com>
When setRange is called on a TypedData receiver and the source is also
a TypedData object with the same element size and clamping is not
required, the VM implementation now calls _boundsCheckAndMemcpyN for
element size N. The generated IL for these methods performs the copy
using the MemoryCopy instruction (mostly, see the note below).
Since the two TypedData objects might have the same underlying
buffer, the CL adds a can_overlap flag to the MemoryCopy instruction
which checks for overlapping regions. If can_overlap is set, then
the copy is performed backwards instead of forwards when needed
to ensure that elements of the source region are read before
they are overwritten.
The existing uses of the MemoryCopy instruction are adjusted as
follows:
* The IL generated for copyRangeFromUint8ListToOneByteString
passes false for can_overlap, as all uses currently ensure that
the OneByteString is non-external and thus cannot overlap.
* The IL generated for _memCopy, used by the FFI library, passes
true for can_overlap, as there is no guarantee that the regions
pointed at by the Pointer objects do not overlap.
The MemoryCopy instruction has also been adjusted so that all numeric
inputs (the two start offsets and the length) are either boxed or
unboxed instead of just the length. This exposed an issue
in the inliner, where unboxed constants in the callee graph were
replaced with boxed constants when inlining into the caller graph,
since withList calls setRange with constant starting offsets of 0.
Now the representation of constants in the callee graph are preserved
when inlining the callee graph into the caller graph.
Fixes https://github.com/dart-lang/sdk/issues/51237 by using TMP
and TMP2 for the LDP/STP calls in the 16-byte element size case, so no
temporaries need to be allocated for the instruction.
On ARM when not unrolling the memory copy loop, uses TMP and a single
additional temporary for LDM/STM calls in the 8-byte and 16-byte
element cases, with the latter just using two LDM/STM calls within
the loop, a different approach than the one described in
https://github.com/dart-lang/sdk/issues/51229 .
Note: Once the number of elements being copied reaches a certain
threshold (1048576 on X86, 256 otherwise), _boundsCheckAndMemcpyN
instead calls _nativeSetRange, which is a native call that uses memmove
from the standard C library for non-clamped inputs. It does this
because the code currently emitted for MemoryCopy performs poorly
compared to the more optimized memmove implementation when copying
larger regions of memory.
Notable benchmark changes for dart-aot:
* X64
* TypedDataDuplicate.*.fromList improvement from ~13%-~250%
* Uf8Encode.*.10 improvement from ~50%-~75%
* MapCopy.Map.*.of.Map.* improvement from ~13%-~65%
* MemoryCopy.*.setRange.* improvement from ~13%-~500%
* ARM7
* Uf8Encode.*.10 improvement from ~35%-~70%
* MapCopy.Map.*.of.Map.* improvement from ~6%-~75%
* MemoryCopy.*.setRange.{8,64} improvement from ~22%-~500%
* Improvement of ~100%-~200% for MemoryCopy.512.setRange.*.Double
* Regression of ~40% for MemoryCopy.512.setRange.*.Uint8
* Regression of ~85% for MemoryCopy.4096.setRange.*.Uint8
* ARM8
* Uf8Encode.*.10 improvement from ~35%-~70%
* MapCopy.Map.*.of.Map.* improvement from ~7%-~75%
* MemoryCopy.*.setRange.{8,64} improvement from ~22%-~500%
* Improvement of ~75%-~160% for MemoryCopy.512.setRange.*.Double
* Regression of ~40% for MemoryCopy.512.setRange.*.Uint8
* Regression of ~85% for MemoryCopy.4096.setRange.*.Uint8
TEST=vm/cc/IRTest_Memory, co19{,_2}/LibTest/typed_data,
lib{,_2}/typed_data, corelib{,_2}/list_test
Issue: https://github.com/dart-lang/sdk/issues/42072
Issue: b/294114694
Issue: b/259315681
Change-Id: Ic75521c5fe10b952b5b9ce5f2020c7e3f03672a9
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/319521
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Tess Strickland <sstrickl@google.com>
Right now all type literal usages will perform a runtime call which is
rather slow.
Flutter happens to use type literals such as `return T;` in hot code
which causes this to show up in the profile.
This CL adds fast paths for type parameter type literals if
the type parameter value (i.e. entry of TAV corresponding to T):
* is `null`: return `dynamic`
* is a non-FutureOr [Type] with compatible nullability: return value
* is [FunctionType] with compatible nullability: return value
otherwise fall back to runtime call.
It makes simple type literal uses 10x+ faster - the kinds that Flutter
is using.
Issue https://github.com/dart-lang/sdk/issues/48757
TEST=vm/dart{,_2}/instantiate_type_literal_test
Change-Id: I1139d6689aedbc68321f47ee6c9946a3323fbf6e
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/241968
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Martin Kustermann <kustermann@google.com>
Implements a backend targeting RV32GC and RV64GC, based on Linux standardizing around GC. The assembler is written to make it easy to disable usage of C, but because the sizes of some instruction sequences are compile-time constants, an additional build configuration would need to be defined to make use of it.
The assembler and disassembler cover every RV32/64GC instruction. The simulator covers all instructions except accessing CSRs and the floating point state accessible through such, include accrued exceptions and dynamic rounding mode.
Quirks:
- RISC-V is a compare-and-branch architecture, but some existing "architecture-independent" parts of the Dart compiler assume a condition code architecture. To avoid rewriting these parts, we use a peephole in the assembler to map to compare-and-branch. See Assembler::BranchIf. Luckily nothing depended on taking multiple branches on the same condition code set.
- There are no hardware overflow checks, so we must use Hacker's Delight style software checks. Often these are very cheap: if the sign of one operand is known, a single branch is needed.
- The ranges of RISC-V branches and jumps are such that we use 3 levels of generation for forward branches, instead of the 2 levels of near and far branches used on ARM[64]. Nearly all code is handled by the first two levels with 20-bits of range, with enormous regex matchers triggering the third level that uses aupic+jalr to get 32-bits of range.
- For PC-relative calls in AOT, we always generate auipc+jalr pairs with 32-bits of range, so we never generate trampolines.
- Only a subset of registers are available in some compressed instructions, so we assign the most popular uses to these registers. In particular, THR, TMP[2], CODE and PP. This has the effect of assigning CODE and PP to volatile registers in the C calling convention, whereas they are assigned preserved registers on the other architectures. As on ARM64, PP is untagged; this is so short indices can be accessed with a compressed instruction.
- There are no push or pop instructions, so combining pushes and pops is preferred so we can update SP once.
- The C calling convention has a strongly aligned stack, but unlike on ARM64 we don't need to use an alternate stack pointer. The author ensured language was added to the RISC-V psABI making the OS responsible for realigning the stack pointer for signal handlers, allowing Dart to leave the stack pointer misaligned from the C calling convention's point of view until a foreign call.
- We don't bother with the link register tracking done on ARM[64]. Instead we make use of an alternate link register to avoid inline spilling in the write barrier.
Unimplemented:
- non-trivial FFI cases
- Compressed pointers - No intention to implement.
- Unboxed SIMD - We might make use of the V extension registers when the V extension is ratified.
- BigInt intrinsics
TEST=existing tests for IL level, new tests for assembler/disassembler/simulator
Bug: https://github.com/dart-lang/sdk/issues/38587
Bug: https://github.com/dart-lang/sdk/issues/48164
Change-Id: I991d1df4be5bf55efec5371b767b332d37dfa3e0
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/217289
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Both ARM and ARM64 variants did not account for the
fact that TransitionNativeToGenerated will clobber
LR on slow path.
TEST=tests/ffi/regress_jump_to_frame_test.dart
Cq-Include-Trybots: luci.dart.try:vm-ffi-android-release-arm-try,vm-ffi-android-release-arm64-try,vm-kernel-linux-release-simarm64-try,vm-kernel-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try
Change-Id: I40d48b720b2a7f31ff20903a887295ab2034662c
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/173962
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
> Header files should be self-contained (compile on their own) and end in .h. Non-header files that are meant for inclusion should end in .inc and be used sparingly.
>
> All header files should be self-contained. Users and refactoring tools should not have to adhere to special conditions to include the header. Specifically, a header should have header guards and include all other headers it needs.
This cleans up header files referring to types and functions defined in the files including those header files.
This does not clean up the include guards in xyz_<arch>.h. We have currently 45 such include guards. We can clean that up by moving the #ifdefs from xyz.h to the individual xyz_<arch>.h files. A list of header files which cannot stand on itself is maintained in runtime/tools/run_clang_tidy.dart.
Change-Id: I9ab1fc09056d86e8ac59a80c063a812633cf7c71
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/135650
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Sign extension of small integers is not symmetric between register arguments and register return values.
On Linux/MacOS x64, the caller is responsible for both the arguments and return value.
Previous tests only tested equality, which tests the equality of the lowest byte. However, when printing or using the small ints arithmetic all 4 bytes are used. The new tests pass back the number in a different format.
The callback tests test the number in Dart, so they did not suffer from implicit conversions. (TestTakeMaxUint8x10 in runtime/bin/ffi_test/ffi_test_functions.cc and tests/ffi_2/function_callbacks_test.dart.)
Fixes: https://github.com/dart-lang/sdk/issues/40537
Change-Id: I6a57cb7cb43206926eb101a66e3b2abfacec72a0
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/134825
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Introduces NativeRepresentation and NativeLocation for the compilation of FFI.
NativeRepresentations are able to express all representations (or types) of the native ABIs we bind to with FFI, this is more representations that than that are used in Dart itself.
NativeLocations are able to express all locations of the native ABIs we bind to with FFI, this is more types of locations than that are used for the Dart calling convention.
See the documentation in the respective files.
These NativeLocations and NativeRepresentations are computed by the NativeCallingConvention and consumed by the Marshaller and Assemblers.
This reenginering is required for go/dart-ffi-by-value, hardfp (Arm S and D fpu registers), and iOS 64 bit (non-word-aligned stack arguments).
In addition, by using the NativeRepresentations we also get slightly reduced code size:
* The tracking of sizes is improved, so less sign/zero-extension operations are required.
* UnboxedWidthExtenderInstr is fully removed, the size extension is done inside the native moves, coalescing moves and size extension when possible.
* BitCastInstr is only used when really needed. This reduces code-size on arm32 softfp.
This fixes the iOS arm64 calling convention, manually tested with https://github.com/flutter/flutter/pull/46078 and https://dart-review.googlesource.com/c/sdk/+/131074.
Fixes: https://github.com/dart-lang/sdk/issues/39637
Issue: https://github.com/dart-lang/sdk/issues/36309
Issue: https://github.com/dart-lang/sdk/issues/36730
Change-Id: I8878bc0f314277bab4ca22f417c6295ecc017720
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Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
The original revision is in patchset 1.
Three bugs are fixed:
1. Fix SIMARM_X64 build: no need to generate trampolines for AOT or simulated JIT.
2. Hot-reload: Fix hot-reload: don't invalidate Code for force-optimized functions.
3. Windows: Provide shadow space to runtime routines.
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Change-Id: I326009cfacb51a84e9de4ddf9ff2d6d415460f91
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/113829
Commit-Queue: Samir Jindel <sjindel@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Refactoring motivation: go/dart-simulated-ffi
* template Location and PairLocation with <dart::Register, dart::FpuRegister> or <dart::host::Register, dart::host::FpuRegister>
* move RegisterName and FpuRegisterName from assembler to constants
* move methods that are only implemented by Location and not HostLocation out of Location
Change-Id: Ie9aa2dae63380da0cbfb15eacc440537fbed48f8
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-bare-linux-release-simarm-try, vm-kernel-precomp-bare-linux-release-simarm64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-linux-debug-simdbc64-try, vm-kernel-precomp-win-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/98845
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Auto-Submit: Daco Harkes <dacoharkes@google.com>
There is no difference from the previous version of this CL.
This depends on https://dart-review.googlesource.com/c/sdk/+/67220/3 which fixes a bug
in `CompileType` that was causing `ShouldEmitStoreBarrier()` to return different results
across multiple calls on the same instruction.
The buildbot on which this caused a failure is run as a tryjob below.
Change-Id: I078b587f7e23e88d95f3b05c966019a433ba57d9
Reviewed-on: https://dart-review.googlesource.com/67221
Commit-Queue: Samir Jindel <sjindel@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
This reverts commit 79ed0553e9.
Reason for revert: Issue with register allocator on SIMARM.
Original change's description:
> Re-land "[vm] Factor out more of the slow-path of the store barrier into the stubs."
>
> When compiling instrinsic graphs on ARM and ARM64 we need to save LR when emitting
> the store barrier because the intrinsics don't have frames and won't restore it before
> returning.
>
> Original revision is in Patchset 1.
>
> Change-Id: I58cee3941c82efa22bd6ddbd00e00c489de53898
> Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-win-release-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try
> Reviewed-on: https://dart-review.googlesource.com/66382
> Commit-Queue: Samir Jindel <sjindel@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
TBR=alexmarkov@google.com,sjindel@google.com
# Not skipping CQ checks because original CL landed > 1 day ago.
Change-Id: If8f8bc1a508f300ab83b03a0be7e0c318e5f99fe
Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-precomp-linux-release-simarm-try, vm-kernel-precomp-linux-release-simarm64-try, vm-kernel-precomp-linux-release-x64-try, vm-kernel-precomp-win-release-x64-try, vm-kernel-linux-release-simarm-try, vm-kernel-linux-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/67140
Reviewed-by: Samir Jindel <sjindel@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Commit-Queue: Samir Jindel <sjindel@google.com>
When compiling instrinsic graphs on ARM and ARM64 we need to save LR when emitting
the store barrier because the intrinsics don't have frames and won't restore it before
returning.
Original revision is in Patchset 1.
Change-Id: I58cee3941c82efa22bd6ddbd00e00c489de53898
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Reviewed-on: https://dart-review.googlesource.com/66382
Commit-Queue: Samir Jindel <sjindel@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
This reverts commit b3e289a95e.
Reason for revert: multiple failures on *-simarm, *-simarm64 and vm-precomp-android-release-2-3-be bots.
Original change's description:
> [vm] Factor out more of the slow-path of the store barrier into the stubs.
>
> This delivers a 2.1% code size reduction on Flutter Gallery, and roughly 1.6% speed
> improvement on dart2js(dart2js).
>
> Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-win-release-x64-try
> Change-Id: I2d2ceca8707d5e6fba79c558624d611f9e17d21a
> Reviewed-on: https://dart-review.googlesource.com/65060
> Commit-Queue: Samir Jindel <sjindel@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
TBR=alexmarkov@google.com,sjindel@google.com
Change-Id: Iae83a5108d56cbd30e5727217b5ee043449f82ff
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
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Reviewed-on: https://dart-review.googlesource.com/66360
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Alexander Markov <alexmarkov@google.com>
Vyacheslav Egorov