Refactoring motivation: go/dart-simulated-ffi
* template Location and PairLocation with <dart::Register, dart::FpuRegister> or <dart::host::Register, dart::host::FpuRegister>
* move RegisterName and FpuRegisterName from assembler to constants
* move methods that are only implemented by Location and not HostLocation out of Location
Change-Id: Ie9aa2dae63380da0cbfb15eacc440537fbed48f8
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-bare-linux-release-simarm-try, vm-kernel-precomp-bare-linux-release-simarm64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-linux-debug-simdbc64-try, vm-kernel-precomp-win-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/98845
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Auto-Submit: Daco Harkes <dacoharkes@google.com>
Prototype for `dart:ffi` on Linux/MacOS x64 in JIT mode.
`dart:ffi` is experimental and its API is likely to change in the future.
Progress and design decisions are tracked in https://github.com/dart-lang/sdk/projects/13
issue: https://github.com/dart-lang/sdk/issues/34452
Change-Id: Ifa4566388e42c8757f154741d11e303465ef305d
Cq-Include-Trybots: luci.dart.try:vm-kernel-optcounter-threshold-linux-release-x64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-precomp-linux-release-simarm-try, vm-kernel-precomp-linux-release-simarm64-try, vm-kernel-precomp-linux-release-x64-try, vm-kernel-precomp-mac-release-simarm64-try, vm-kernel-precomp-win-release-x64-try, vm-kernel-mac-debug-x64-try, vm-kernel-asan-linux-release-x64
Reviewed-on: https://dart-review.googlesource.com/c/80124
Reviewed-by: Samir Jindel <sjindel@google.com>
Auto-Submit: Daco Harkes <dacoharkes@google.com>
Unlike the assembler, the register allocator is in a position to avoid a move. Use the call result register since it is the most popular value source.
This pattern will also be needed to get the write barrier slot into a fixed register for card-marking, since X64 and ARM don't have a TMP2.
dart2js aot product:
X64 Instructions(CodeSize): 9049952 -> 8994240 (-0.62%)
ARM Instructions(CodeSize): 9772096 -> 9711696 (-0.62%)
ARM64 Instructions(CodeSize): 10185056 -> 10122496 (-0.61%)
Bug: https://github.com/dart-lang/sdk/issues/34002
Change-Id: Id2e9dd7b3d86069a9da3ba4e141720511ce6399e
Reviewed-on: https://dart-review.googlesource.com/76307
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
There is no difference from the previous version of this CL.
This depends on https://dart-review.googlesource.com/c/sdk/+/67220/3 which fixes a bug
in `CompileType` that was causing `ShouldEmitStoreBarrier()` to return different results
across multiple calls on the same instruction.
The buildbot on which this caused a failure is run as a tryjob below.
Change-Id: I078b587f7e23e88d95f3b05c966019a433ba57d9
Reviewed-on: https://dart-review.googlesource.com/67221
Commit-Queue: Samir Jindel <sjindel@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
This reverts commit 79ed0553e9.
Reason for revert: Issue with register allocator on SIMARM.
Original change's description:
> Re-land "[vm] Factor out more of the slow-path of the store barrier into the stubs."
>
> When compiling instrinsic graphs on ARM and ARM64 we need to save LR when emitting
> the store barrier because the intrinsics don't have frames and won't restore it before
> returning.
>
> Original revision is in Patchset 1.
>
> Change-Id: I58cee3941c82efa22bd6ddbd00e00c489de53898
> Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-win-release-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try
> Reviewed-on: https://dart-review.googlesource.com/66382
> Commit-Queue: Samir Jindel <sjindel@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
TBR=alexmarkov@google.com,sjindel@google.com
# Not skipping CQ checks because original CL landed > 1 day ago.
Change-Id: If8f8bc1a508f300ab83b03a0be7e0c318e5f99fe
Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-precomp-linux-release-simarm-try, vm-kernel-precomp-linux-release-simarm64-try, vm-kernel-precomp-linux-release-x64-try, vm-kernel-precomp-win-release-x64-try, vm-kernel-linux-release-simarm-try, vm-kernel-linux-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/67140
Reviewed-by: Samir Jindel <sjindel@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Commit-Queue: Samir Jindel <sjindel@google.com>
When compiling instrinsic graphs on ARM and ARM64 we need to save LR when emitting
the store barrier because the intrinsics don't have frames and won't restore it before
returning.
Original revision is in Patchset 1.
Change-Id: I58cee3941c82efa22bd6ddbd00e00c489de53898
Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-win-release-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/66382
Commit-Queue: Samir Jindel <sjindel@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
This reverts commit b3e289a95e.
Reason for revert: multiple failures on *-simarm, *-simarm64 and vm-precomp-android-release-2-3-be bots.
Original change's description:
> [vm] Factor out more of the slow-path of the store barrier into the stubs.
>
> This delivers a 2.1% code size reduction on Flutter Gallery, and roughly 1.6% speed
> improvement on dart2js(dart2js).
>
> Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-win-release-x64-try
> Change-Id: I2d2ceca8707d5e6fba79c558624d611f9e17d21a
> Reviewed-on: https://dart-review.googlesource.com/65060
> Commit-Queue: Samir Jindel <sjindel@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
TBR=alexmarkov@google.com,sjindel@google.com
Change-Id: Iae83a5108d56cbd30e5727217b5ee043449f82ff
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Cq-Include-Trybots: luci.dart.try: vm-kernel-optcounter-threshold-linux-release-x64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-precomp-linux-release-simarm-try, vm-kernel-precomp-linux-release-simarm64-try, vm-kernel-precomp-linux-release-x64-try, vm-kernel-precomp-win-release-x64-try
Reviewed-on: https://dart-review.googlesource.com/66360
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Alexander Markov <alexmarkov@google.com>
The stub code for calling into the runtime is now responsible for saving any
live registers. Since it doesn't know which registers are live (it's shared
across many safepoints), it saves all the registers. The stackmaps and
environments for safepoints which call this stub are extended to cover the stack
slots in the stub's frame which correspond to registers which are actually live
at the safepoint.
Currently this is only supported in precompiled X64 for the `CheckNull`
slow-path. By creating a separate stub for the CheckNull slow path we are able
to eliminate the size overhead of preparing arguments for the runtime call stub,
and reduce the slow-path size on X64 to 1 instruction.
# Test Plan
The stackmap for a safepoint in the `CheckNull` slowpath is only used when
handling the exception causes a GC, which is extremely unlikely. To induce this,
we add a flag to force this behavior in debug-mode and a test which exercises
this. The rest of the changes inherit existing coverage.
Change-Id: I3d8f2a7c3560c432599344d7420d42ddbee7a89d
Reviewed-on: https://dart-review.googlesource.com/59660
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Samir Jindel <sjindel@google.com>
Our generated code does not keep the context in a special register
anymore (for quite some time now). The context is just another definition
in the IR language and gets assigned register locations by the linearscan
register allocator.
Furthermore we no longer use an empty context for closures which have no
captured states, instead the context of those closures is just `null`.
This CL therefore removes Object::empty_context() and the CTX constant.
Change-Id: Iea171e0d0fd56c48f1c456e08e060a12267e39cc
Reviewed-on: https://dart-review.googlesource.com/51129
Commit-Queue: Martin Kustermann <kustermann@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Apart from removing almost 1000 lines of very repetitive code, the idea here is
to change the assembler from a huge pile of arbitrary code into something that
can be used to generate tables of opcodes and their structure. Later, I'd like to
use this to make the disassembler more table driven and less arbitrary, and
perhaps build an x86 simulator in the same vein as the ARM simulator, which
would help me debug (I find the ARM simulator very useful when making low level
changes to the VM and miss its functionality on x86).
R=vegorov@google.com
Bug:
Change-Id: I1ae2c1696f88b67862843c9ac05c827a7c9b9a6e
Reviewed-on: https://dart-review.googlesource.com/25241
Commit-Queue: Erik Corry <erikcorry@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
There are three types of changes in this CL:
* If there is a repeated per-component sequence of instruction, it is
replaced with a loop (e.g. see Float32x4ConstructorInstr);
* When accessing components in the spilled SIMD values don't use
hardcoded constants but instead compute the offset from op_kind()
(e.g. kFloat32x4WithZ accesses component with index kFloat32x4WithZ - kFloat32x4WithX = 2).
This allows to share code.
* Use setcc and arithmetic to materialize result of the comparison instead of branches;
* Use the fact that true and false are consecutive values in the Thread structure to convert
0/1 to true/false (see Int32x4GetFlagInstr)
* Extract Int32x4 components without spilling the whole SIMD value to the
stack (see Int32x4GetFlagInstr).
This extracted from a larger refactoring CL: https://dart-review.googlesource.com/c/sdk/+/10120
Bug: https://github.com/dart-lang/sdk/issues/30949
Change-Id: Ic3757789a1ca621b267150133991fed5b85da633
Reviewed-on: https://dart-review.googlesource.com/11080
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Zach Anderson <zra@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
This CL introduces new IL instruction, CheckNullInstr, for testing
if an object is null. This instruction will be used to ensure
correctness when AOT relies on strong mode types, which are nullable
by default (unless proven otherwise).
Code generation of CheckNullInstr is implemented without major code
duplication between different CPUs using common macro-assembler
pseudo-instructions implemented by all platforms.
Also, code generation of GenericCheckBoundInstr is refactored in
the similar way.
Issue: https://github.com/dart-lang/sdk/issues/30480
Change-Id: I35e9b556302fe7db98ce5167b3601f08ddbee642
Reviewed-on: https://dart-review.googlesource.com/4540
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Zach Anderson <zra@google.com>
i.e. #ifndef VM_WHATEVER -> #ifndef RUNTIME_VM_WHATEVER
This lets us remove a hack from the PRESUBMIT.py script that existed
for reasons that are no longer valid, and sets us up to add some
presubmit checks for the GN build.
R=asiva@google.com, rmacnak@google.com
Review URL: https://codereview.chromium.org/2450713004 .
Instead of calling code object directly, call indirectly and
pass the code object in a register. The object pool is then loaded from
the code object. This is another preparation step for making generated code
relocatable.
All non-ia32 platforms:
No entry patching.
ARM:
PC marker (now code object) moves to the same place as on x64 (below saved PP, above saved FP).
R9 is now used as PP, R10 as CODE_REG.
BUG=
R=rmacnak@google.com
Review URL: https://codereview.chromium.org//1192103004 .
Add THR register that caches the current thread in generated code.
Shuffle some registers around as needed to free one up.
Note: Assembler::LoadIsolate now always loads the *current* isolate whenever the code is executed, rather than the isolate in which the code was compiled (no existing code was affected by this slight change in semantics).
Rewrite some ia32 stubs to use one less register, and for some ia32 bigint intrinsics, explicitly save THR (like CTX in the past, see r44699).
Next steps:
- pass current thread rather than isolate in NativeArguments
- ditto for exception handler jump
- migrate fields vm_tag, top_exit_frame_info, etc. to thread
R=srdjan@google.com
Review URL: https://codereview.chromium.org//1156593002
1. Build script tools/build.py now actually builds X64 target when x64
is passed as an architecture:
- GYP files set 'msvs_configuration_platform': 'x64' for Win_x64
configuration;
- NSS related files are fixed to have correct set of defines for ia32
and x64 builds and include right files. A os_windows.c file added to
work-around inability to have different sets of source files per
configuration. Originally this was controlled through target_arch GYP
define and required regeneration of the solution.
- build.py passes Win32 or x64 platform to devenv as part of build
configuration argument;
2. Dart VM now supports Win64 ABI. ABI description is moved into a
separate class CallingConventions in constants_x64.h.
BUG=http://dartbug.com/7792R=iposva@google.com, ricow@google.com, srdjan@google.com
Review URL: https://codereview.chromium.org//317773002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@37078 260f80e4-7a28-3924-810f-c04153c831b5
Daco Harkes