Refactoring motivation: go/dart-simulated-ffi
* template Location and PairLocation with <dart::Register, dart::FpuRegister> or <dart::host::Register, dart::host::FpuRegister>
* move RegisterName and FpuRegisterName from assembler to constants
* move methods that are only implemented by Location and not HostLocation out of Location
Change-Id: Ie9aa2dae63380da0cbfb15eacc440537fbed48f8
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-bare-linux-release-simarm-try, vm-kernel-precomp-bare-linux-release-simarm64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-linux-debug-simdbc64-try, vm-kernel-precomp-win-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/98845
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Auto-Submit: Daco Harkes <dacoharkes@google.com>
Unlike the assembler, the register allocator is in a position to avoid a move. Use the call result register since it is the most popular value source.
This pattern will also be needed to get the write barrier slot into a fixed register for card-marking, since X64 and ARM don't have a TMP2.
dart2js aot product:
X64 Instructions(CodeSize): 9049952 -> 8994240 (-0.62%)
ARM Instructions(CodeSize): 9772096 -> 9711696 (-0.62%)
ARM64 Instructions(CodeSize): 10185056 -> 10122496 (-0.61%)
Bug: https://github.com/dart-lang/sdk/issues/34002
Change-Id: Id2e9dd7b3d86069a9da3ba4e141720511ce6399e
Reviewed-on: https://dart-review.googlesource.com/76307
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Our generated code does not keep the context in a special register
anymore (for quite some time now). The context is just another definition
in the IR language and gets assigned register locations by the linearscan
register allocator.
Furthermore we no longer use an empty context for closures which have no
captured states, instead the context of those closures is just `null`.
This CL therefore removes Object::empty_context() and the CTX constant.
Change-Id: Iea171e0d0fd56c48f1c456e08e060a12267e39cc
Reviewed-on: https://dart-review.googlesource.com/51129
Commit-Queue: Martin Kustermann <kustermann@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Apart from removing almost 1000 lines of very repetitive code, the idea here is
to change the assembler from a huge pile of arbitrary code into something that
can be used to generate tables of opcodes and their structure. Later, I'd like to
use this to make the disassembler more table driven and less arbitrary, and
perhaps build an x86 simulator in the same vein as the ARM simulator, which
would help me debug (I find the ARM simulator very useful when making low level
changes to the VM and miss its functionality on x86).
R=vegorov@google.com
Bug:
Change-Id: I1ae2c1696f88b67862843c9ac05c827a7c9b9a6e
Reviewed-on: https://dart-review.googlesource.com/25241
Commit-Queue: Erik Corry <erikcorry@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
This CL introduces new IL instruction, CheckNullInstr, for testing
if an object is null. This instruction will be used to ensure
correctness when AOT relies on strong mode types, which are nullable
by default (unless proven otherwise).
Code generation of CheckNullInstr is implemented without major code
duplication between different CPUs using common macro-assembler
pseudo-instructions implemented by all platforms.
Also, code generation of GenericCheckBoundInstr is refactored in
the similar way.
Issue: https://github.com/dart-lang/sdk/issues/30480
Change-Id: I35e9b556302fe7db98ce5167b3601f08ddbee642
Reviewed-on: https://dart-review.googlesource.com/4540
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Zach Anderson <zra@google.com>
i.e. #ifndef VM_WHATEVER -> #ifndef RUNTIME_VM_WHATEVER
This lets us remove a hack from the PRESUBMIT.py script that existed
for reasons that are no longer valid, and sets us up to add some
presubmit checks for the GN build.
R=asiva@google.com, rmacnak@google.com
Review URL: https://codereview.chromium.org/2450713004 .
Instead of calling code object directly, call indirectly and
pass the code object in a register. The object pool is then loaded from
the code object. This is another preparation step for making generated code
relocatable.
All non-ia32 platforms:
No entry patching.
ARM:
PC marker (now code object) moves to the same place as on x64 (below saved PP, above saved FP).
R9 is now used as PP, R10 as CODE_REG.
BUG=
R=rmacnak@google.com
Review URL: https://codereview.chromium.org//1192103004 .
Add THR register that caches the current thread in generated code.
Shuffle some registers around as needed to free one up.
Note: Assembler::LoadIsolate now always loads the *current* isolate whenever the code is executed, rather than the isolate in which the code was compiled (no existing code was affected by this slight change in semantics).
Rewrite some ia32 stubs to use one less register, and for some ia32 bigint intrinsics, explicitly save THR (like CTX in the past, see r44699).
Next steps:
- pass current thread rather than isolate in NativeArguments
- ditto for exception handler jump
- migrate fields vm_tag, top_exit_frame_info, etc. to thread
R=srdjan@google.com
Review URL: https://codereview.chromium.org//1156593002
Remove representation from location. Presence of representation in location encoding was violating the invariant that unequal locations must be disjoint (where equality for locations is defined in terms of bitwise equality of their encoding). This could lead ParallelMoveResolver to treat XMM1 containing unboxed double as unequal location to XMM1 containing unboxed mint, which is obviously incorrect.
For similar reason eliminate kFloat32x4StackSlot and kUint32x4StackSlot distinction is eliminated and both are replaced with kQuadStackSlot. Register allocator now guarantees that no kQuadStackSlot occupies the same space as any other kDoubleStackSlot. This also shrinks optimized stack when only doubles are used (but might lead to a higher stack utilization when a mixture of doubles and quads is used).
Implement allocation of scratch Cpu and Xmm registers for ParallelMoveResolver. This also allows to remove push(eax)/pop(eax) pairs when resolving memory-memory cycles on ia32.
BUG=dart:9710
Review URL: https://codereview.chromium.org//13801014
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21148 260f80e4-7a28-3924-810f-c04153c831b5
The purpose of this change is twofold:
1. Source in the bin directory can now use the same assertions as
source in the vm directory. The ASSERT macro used by the code
in runtime/bin was just defined to use assert from the standard
C library.
2. Moving other implementation parts from runtime/vm to
runtime/platform (e.g. classes Monitor and Mutex) for sharing
between runtime/bin and runtime/vm will be easier as these
implementations rely on these assertion macros.
Created two gypi files for the platform directory. One for the
headers and one for the source. The source one is only included
when building the VM library and will be present in libdart.a
when the dart executable is linked.
All the code for asserts is still in the dart namespace.
Also re-arranged the order of includes to be alphabetically in
the files touched.
R=ager@google.com, iposva@google.com
BUG=
TEST=
Review URL: http://codereview.chromium.org//9189003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@3335 260f80e4-7a28-3924-810f-c04153c831b5
Daco Harkes