Before this change, we would assume all stacks have the size the VM specifies for threads it creates, but this won't be accurate for the initial thread or threads created by the embedder.
Change-Id: I6605a88d6666a6f9d47fbe047d3fdd02aa22c80a
Reviewed-on: https://dart-review.googlesource.com/10209
Reviewed-by: Zach Anderson <zra@google.com>
New folder structure (nested under vm/):
- compiler/
- jit/ - JIT specific code
- aot/ - AOT specific code
- backend/ - all middle-end and back-end code (IL, flow graph)
- assembler/ - assemblers and disassemblers
- frontend/ - front ends (AST -> IL, Kernel -> IL)
compiler/README.md would be the documentation root for the compiler
pipeline
Bug: https://github.com/dart-lang/sdk/issues/30575
Change-Id: I2dfd9688793bff737f7632ddc77fca766875ce36
Reviewed-on: https://dart-review.googlesource.com/2940
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
This CL includes db26c89347 (patch set #1)
with fix (patch set #2):
* Include simulator.h explicitly where it is required as it is no
longer included implicitly through other header files.
Original review: https://codereview.chromium.org/2995803002/
When running on the simulator for arm/arm64, compare-and-swap operations
used in VM were synchronized with simulator using mutex.
It heavily impacts performance when doing parallel marking due to high
contention (see #30317).
This synchronization was implemented in order to make simulated
LDREX/STREX instructions aware of CAS performed in VM.
This CL drops this synchronization between VM and simulator:
CAS operations in VM become regular, and simulator remembers value loaded
with load-exclusive and performs CAS when doing store-exclusive to catch
any concurrent modifications.
Speeds up gen_snapshot of flutter benchmark complex_layout from 9.2s
to 8.0s on my MacBook.
R=asiva@google.com
Review-Url: https://codereview.chromium.org/2999853002 .
When running on the simulator for arm/arm64, compare-and-swap operations
used in VM were synchronized with simulator using mutex.
It heavily impacts performance when doing parallel marking due to high
contention (see #30317).
This synchronization was implemented in order to make simulated
LDREX/STREX instructions aware of CAS performed in VM.
This CL drops this synchronization between VM and simulator:
CAS operations in VM become regular, and simulator remembers value loaded
with load-exclusive and performs CAS when doing store-exclusive to catch
any concurrent modifications.
Speeds up gen_snapshot of flutter benchmark complex_layout from 9.2s
to 8.0s on my MacBook.
R=asiva@google.com, rmacnak@google.com
Review-Url: https://codereview.chromium.org/2995803002 .
The assertions which tried to assert that we only use
StackFrameIterator to walk frames of the current thread was incorrect.
We already have cases where other threads will walk the stack of the
mutator thread, see below for an example where this can happen.
Thread::VisitObjectPointers was incorrectly passing Thread::Current() to
the StackFrameIterator instead of 'this'. (Code in thread_registry.cc will
loop over a number of threads and calls VisitObjectPointers on them)
Mutator thread:
0 pthread_cond_wait@@GLIBC_2.3.2
1 dart::Monitor::WaitMicros
2 dart::Monitor::Wait
3 dart::MonitorLocker::Wait
4 dart::ThreadBarrier::Sync
5 dart::GCMarker::MarkObjects
6 dart::PageSpace::MarkSweep
7 dart::Heap::CollectOldSpaceGarbage
8 dart::Heap::CollectNewSpaceGarbage
9 dart::Heap::CollectGarbage
10 dart::DN_HelperObject_<native>
11 dart::BootstrapNatives::<native>
<dart frames>
MarkTask thread:
1 dart::EntryFrame::VisitObjectPointers
2 dart::Thread::VisitObjectPointers <---- Walks mutator thread stack
3 dart::ThreadRegistry::VisitObjectPointers <---- Iterates over a number of threads
4 dart::Isolate::VisitStackPointers
5 dart::Isolate::VisitObjectPointers
6 dart::GCMarker::IterateRoots
7 dart::MarkTask::Run
8 dart::ThreadPool::Worker::Loop
9 dart::ThreadPool::Worker::Main
10 dart::ThreadStart
R=rmacnak@google.com
Review-Url: https://codereview.chromium.org/2845053003 .
- Refactor the JumpToExceptionHandle code so that it is now built from
two pieces: JumpToFrame and RunExceptionHandler.
- Refactor the Simulator::Longjmp() code so that it is no longer
exception-specific. Instead it uses the RunExceptionHandler stub.
This makes it so that the JumpToFrame stub and Simulator::JumpToFrame
have the same semantics. This will make it easier to land the Rewind
changes I am working on.
There are some oddities for dbc.
BUG=
R=johnmccutchan@google.com
Review URL: https://codereview.chromium.org/2503653002 .
Catch block entries need to be considered when doing lazy deoptimization.
In addition to the return, also patch all catch entry blocks in a function scheduled for lazy deoptimization.
Also, move restoring the pool pointer to the jump-to-handler stub to simplify patching the catch entry.
BUG=#27419
R=rmacnak@google.com
Review URL: https://codereview.chromium.org/2357343003 .
The call sequence is very similar to a classic IC call, except the guarded class and the target are loaded indirectly from the constant pool instead of as immediates. In the monomorphic case, we call directly to the expected target with a class check in the callee. In the unlinked, polymorphic and megamorphic cases, we call a stub; these case are now call-through instead of call-and-return.
Every code, except stubs involved in switchable calls, includes the class check sequence at the beginning. So we now distinguish between a checked and an unchecked entry point. Generated code except the switchable call continues to use the unchecked entry point.
PC offsets are calculated relative to the beginning of the instruction stream, rather than either entry point.
BUG=
R=fschneider@google.com
Review URL: https://codereview.chromium.org/2226893002 .
Allow controlling the target ABI by defining TARGET_ABI_IOS or TARGET_ABI_EABI. If neither is defined, default to the previous behavior.
Make Linux, Mac, Android and iOS agree on the value of PreferredCodeAlignment for all architectures.
BUG=http://dartbug.com/26464R=zra@google.com
Review URL: https://codereview.chromium.org/1982613003 .
stack_limit_,
stack_overflow_flags_,
saved_stack_limit_,
stack_overflow_count_ and
other interrupts mask fields from Isolate structure to Thread structure
- Change the stack overflow check in the prolog to load the stack limit
from the THR register, this removes the back to back dependent loads to
load the stack limit from the Isolate structure
R=johnmccutchan@google.com, rmacnak@google.com
Review URL: https://codereview.chromium.org/1812753002 .
- Use TokenDescriptor instead of intptr_t for all token positions.
- Use TokenDescriptor in raw_object instead of int32_t.
- TokenDescriptor is a POD with an int32_t (this shrinks the size of AST and IR nodes by 32-bits on 64-bit architectures).
There are some cleanups I plan on doing as a follow up CL:
- Replace TokenDescriptor::value() with TokenDescriptor::TokenPos()
R=iposva@google.com, rmacnak@google.com
Review URL: https://codereview.chromium.org/1644793002 .
fields in a thread (i.e fields that are not Dart VM related)
- Split the Thread structure to be a pure Dart per thread structure and add
a pointer to os_thread which points to the OSThread structure
- Change Schedule/UnSchedule to set the Dart Thread structure as the TLS of
the thread when it is inside the Dart world and reset the TLS back to the
OSThread strcuture when is exits the Dart World.
- Moved the stack_base and few stack size related functions to OSThread from Isolate
R=johnmccutchan@google.com, zra@google.com
Review URL: https://codereview.chromium.org/1439483003 .
a svc instruction (or hlt instruction on arm64).
The instructions svc and hlt are used in conjunction with a simulator only.
At least, gdb now stops on armv5te when hitting a stop message (no prompt).
Add support for printing stop message in disassembly on mips and arm64.
Clean up various bkpt codes on arm (now similar to arm64 and mips).
R=zra@google.com
Review URL: https://codereview.chromium.org//1097413004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@45363 260f80e4-7a28-3924-810f-c04153c831b5
This CL:
- Adds SupportsHardwareDivision() to FlowGraphCompiler.
In FlowGraphOptimizer, if SupportsHardwareDivision()
is false, Smi and Mint division operations are not
inlined.
- Reduces the supported addressing modes for ldrd, strd.
For ARMv6 and up, the address only needs to be 4-byte
aligned, for ARMv5TE and below the address must be
8-byte aligned. So, on ARMv5TE, we can split these
each into two instructions, which is easier to do if
the addressing modes are restricted to base + offset,
which is all we were using anyway.
- Uses the smull instruction on ARMv5TE and ARMv6. I don't
remember why it was disabled, and the docs say
it is supported. Verified working on ARMv5TE hardware.
- Fixes a bug in OSR frame entry caused by the
difference between the PC read offset in store vs.
other instructions.
- Fixes assembler tests that have a float return for
targets without vfp.
R=regis@google.com
Review URL: https://codereview.chromium.org//1043943002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@44788 260f80e4-7a28-3924-810f-c04153c831b5
Ryan Macnak