Currently we have things called XPtr which are not what you get from ptr().
Old world:
handle->raw() returns RawObject* (tagged)
raw_obj->ptr() returns RawObject* (untagged)
After 6fe15f6df9:
handle->raw() returns ObjectPtr
obj_ptr->ptr() returns ObjectLayout*
New world:
handle->ptr() returns ObjectPtr
obj_ptr->untag() returns UntaggedObject*
TEST=ci
Change-Id: I6c7f34014cf20737607caaf84979838300d12df2
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/149367
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Siva Annamalai <asiva@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Make them form its own source set (libdart_compiler) and completely exclude
them from AOT runtime targets.
Previously we had some inconsistencies, with some files were using
DART_PRECOMPILED_RUNTIME to fully or partially exclude either contents
from their headers or from implementation, while other files did nothing
and relied on linker to throw their contents away.
This change tries to address this inconsistency.
A follow up change would include a check in most compiler headers which
would prohibit to use them while building AOT runtime.
Change-Id: Ief11b11cbc518b301d3e93fce80580a31bbad151
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/142993
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Refactoring motivation: go/dart-simulated-ffi
* template Location and PairLocation with <dart::Register, dart::FpuRegister> or <dart::host::Register, dart::host::FpuRegister>
* move RegisterName and FpuRegisterName from assembler to constants
* move methods that are only implemented by Location and not HostLocation out of Location
Change-Id: Ie9aa2dae63380da0cbfb15eacc440537fbed48f8
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-bare-linux-release-simarm-try, vm-kernel-precomp-bare-linux-release-simarm64-try, vm-kernel-precomp-linux-debug-x64-try, vm-kernel-linux-debug-simdbc64-try, vm-kernel-precomp-win-release-simarm64-try
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/98845
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Auto-Submit: Daco Harkes <dacoharkes@google.com>
Previously we tried to rely on the assumption that all variables would be
boxed - so the machinery for setting correct catch-entry state only
supported tagged values and constants. However this both leads to worse code
and is not entirely correct assumption.
This also:
- renames various confusingly named classes: we move away from talking
about "catch entry state" to "catch entry moves" - because we only
record a subset of moves that needs to be performed and that does
not describe the whole state;
- refactors a bunch of associated code to be more readable and maintainable;
- adds documentation about catch implementation in optimized code
to runtime/docs/compiler;
Fixes https://github.com/flutter/flutter/issues/21685.
Change-Id: I03ae361a1bb7710acbd9f661ae014e663a163c59
Reviewed-on: https://dart-review.googlesource.com/74860
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
New folder structure (nested under vm/):
- compiler/
- jit/ - JIT specific code
- aot/ - AOT specific code
- backend/ - all middle-end and back-end code (IL, flow graph)
- assembler/ - assemblers and disassemblers
- frontend/ - front ends (AST -> IL, Kernel -> IL)
compiler/README.md would be the documentation root for the compiler
pipeline
Bug: https://github.com/dart-lang/sdk/issues/30575
Change-Id: I2dfd9688793bff737f7632ddc77fca766875ce36
Reviewed-on: https://dart-review.googlesource.com/2940
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
Use that to sync variables to predefined stack
slots inside of exception handler, not before
each MayThrow() instruction.
In JIT mode we can avoid storing extra metadata
by using deopt info instead.
Introduce caching of metadata and
exception handler based on PC.
R=fschneider@google.com, vegorov@google.com
Review-Url: https://codereview.chromium.org/2734323003 .
Use that to sync variables to predefined stack
slots inside of exception handler, not before
each MayThrow() instruction.
In JIT mode we can avoid storing extra metadata
by using deopt info instead.
Introduce caching of metadata and
exception handler based on PC.
R=fschneider@google.com
Review-Url: https://codereview.chromium.org/2640853002 .
i.e. #ifndef VM_WHATEVER -> #ifndef RUNTIME_VM_WHATEVER
This lets us remove a hack from the PRESUBMIT.py script that existed
for reasons that are no longer valid, and sets us up to add some
presubmit checks for the GN build.
R=asiva@google.com, rmacnak@google.com
Review URL: https://codereview.chromium.org/2450713004 .
This CL enables unboxed doubles for simdbc64. Unboxed
doubles are stored in regular dbc registers, which are
really 64-bit stack slots. It also implements binary
and unary double operations and comparisons.
R=vegorov@google.com
Review URL: https://codereview.chromium.org/2120703002 .
Most of the infrastructure is fixed to work with DBC stack layout:
- register allocator allocates DBC registers with the limitation that we allocate only 20 registers and bail out if anything needs spilling (there is no use implementing spilling on DBC because registers are memory locations themselves). We should be able to bump number of CPU registers on DBC up to 256 but this requires major surgery in some parts - so I postponed this;
- lazy deoptimization is implemented, eager deoptimization is not - because we don't emit any code that actually requires it. it's a minor change to support it once we have a target;
- stack scanning respects stack maps built by registers allocator;
We bailout from all unsupported instructions.
R=zra@google.com
Review URL: https://codereview.chromium.org/1992963002 .
Instead of calling code object directly, call indirectly and
pass the code object in a register. The object pool is then loaded from
the code object. This is another preparation step for making generated code
relocatable.
All non-ia32 platforms:
No entry patching.
ARM:
PC marker (now code object) moves to the same place as on x64 (below saved PP, above saved FP).
R9 is now used as PP, R10 as CODE_REG.
BUG=
R=rmacnak@google.com
Review URL: https://codereview.chromium.org//1192103004 .
- Each isolate has its own TimelineEventBuffer
- Each isolate has TimelineEventStreams for API, Compiler, Embedder, Isolate, and GC
- Compiler, Isolate, Embedder, and GC are being inserted into the stream
- Basic unit tests
- Dart API for injecting timeline events
- Arbitrary number of native and Dart arguments can be attached to each event
- JSON printing
- Output can be loaded by about://tracing
- Add --timeline-trace-dir flag
Short term follow up CLS:
- Service protocol requests to enable / disable tracing and retrieve a trace
- UI for Observatory
- Dart code EventStreams and Events
R=asiva@google.com
Review URL: https://codereview.chromium.org//1170503004.
This adds meta-information to object pool entries to allow storing
untagged immediates or code addresses (ExternalLabel) directly.
This eliminates the need to generate extra code to preserve the LSB
when storing immediates as smis (x64, arm64).
BUG=
Review URL: https://codereview.chromium.org//1175523002.
Add deferred deoptimization instructions for return address, pc marker and
object pool pointer. This enables generating unoptimized code lazily
on deoptimization.
This CL does not change the way unoptimized code is generated or collected
yet, but just provides the mechanisms needed. This can be used to allow
code GC for the unoptimized code of optimized functions.
R=iposva@google.com
Review URL: https://codereview.chromium.org//1052563003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@44934 260f80e4-7a28-3924-810f-c04153c831b5
Refactor all remaning cases where the current zone is used through new(Isolate*) and remove this interface.
Removing this interface is needed to move towards multiple threads per isolate, and also makes the caller more aware of the scope of the zone used, reducing the risk of use-after-free.
Make the current thread and the stack zone created around native/runtime entries directly available in their body, saving an indirection (and optimized away if unused).
R=iposva@google.com
Review URL: https://codereview.chromium.org//982873004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@44541 260f80e4-7a28-3924-810f-c04153c831b5
replace it with a sequence of checks that guarantee
0 <= LowerBound(index) < UpperBound(index) < length
and hoist all of those checks out of the enclosing loop.
Upper/Lower bounds are symbolic arithmetic expressions with +, -, *
operations and are computed based on discovered simple induction variables.
Simple induction variable is a variable that follows the pattern v1 <- phi(v0, v1 + 1)
BUG=
R=fschneider@google.com
Review URL: https://codereview.chromium.org//619903002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@40969 260f80e4-7a28-3924-810f-c04153c831b5
- Improve escape/alias analysis:
-- Storing an object into a field of another object does not mean that this object escapes (or has aliases) as long as that object does not have any loads from the same place;
-- Places like X.f and Y.f don't alias if X and Y are two different allocation instructions even if X and Y themselves potentially have aliases;
-- Improve precision of alias analysis for indexed properties;
- Support dematerialization and rematerialization of objects that are referenced by other dematerialized objects.
-- Use fix-point algorithm to collect candidates for allocation sinking;
-- Support aborting unsuccessful allocation sinking.
R=fschneider@google.com, johnmccutchan@google.com
Review URL: https://codereview.chromium.org//395943003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@38404 260f80e4-7a28-3924-810f-c04153c831b5
Changes:
* Register allocator now allocates GPRs for kUnboxedMint.
* Register allocator supports for SameAsFirstInput for register pairs.
* Register allocator properly handles register pairs in environment uses and materialization uses.
* BoxInteger updated on IA32/ARM.
* UnboxInteger updated on IA32/ARM.
* BinaryMintOp updated on IA32/ARM.
* ShiftMintOp updated on IA32/ARM.
* UnaryMintOp updated on IA32/ARM.
* RelationalOp updated on IA32/ARM.
* EqualityCompare updated on IA32/ARM.
* LoadIndexed and StoreIndexed updated on IA32/ARM.
* New Deopt instructions added.
* Update live_registers when an instruction has a fixed register input and a call on the slow path.
* Improve printing of register pairs in flow graph.
* Do not assume live registers in slow paths contain tagged values.
* LiveRange pairs for kUnboxedMint definitions marked as kUntagged representation (reduces stack usage).
* Live register spilling on ARM uses same register order as stack map encoding.
* Spill slots containing tagged and untagged are segregated.
* Print stack maps when printing live ranges with safe points.
* Print allocated spill slot when printing live ranges.
Status:
* IA32 completed. All tests are passing.
* ARM completed. All tests passing.
R=fschneider@google.com, srdjan@google.com, zra@google.com
Review URL: https://codereview.chromium.org//252333002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@36468 260f80e4-7a28-3924-810f-c04153c831b5
Ryan Macnak