Remove representation from location. Presence of representation in location encoding was violating the invariant that unequal locations must be disjoint (where equality for locations is defined in terms of bitwise equality of their encoding). This could lead ParallelMoveResolver to treat XMM1 containing unboxed double as unequal location to XMM1 containing unboxed mint, which is obviously incorrect.
For similar reason eliminate kFloat32x4StackSlot and kUint32x4StackSlot distinction is eliminated and both are replaced with kQuadStackSlot. Register allocator now guarantees that no kQuadStackSlot occupies the same space as any other kDoubleStackSlot. This also shrinks optimized stack when only doubles are used (but might lead to a higher stack utilization when a mixture of doubles and quads is used).
Implement allocation of scratch Cpu and Xmm registers for ParallelMoveResolver. This also allows to remove push(eax)/pop(eax) pairs when resolving memory-memory cycles on ia32.
BUG=dart:9710
Review URL: https://codereview.chromium.org//13801014
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21148 260f80e4-7a28-3924-810f-c04153c831b5
This CL removes optimized access for scalarlist, and only the new TypedData classes
are optimized. I changed the runtime libraries core and math to use typedData
instead of scalarlist (Uint16List is used in StringBuffer, Uint32List by Math.random).
Instead of using LoadIndexed for internal and external arrays,
split external loads into a load of the backing store and a load
of the element.
v3 <- LoadIndexed(v1, index)
becomes
v2 <- LoadUntagged(v1, ExternalTypedData::data_offset)
v3 <- LoadIndexed(v2, index);
For this I introduce two new representations in the IL:
kUntagged (for values that hold a untagged pointer) and
kNoRepresentation (for instructions accept any input
representation)
Deoptimization does not need to know about kUntagged
since these values can never occur in the environment.
Also with this change:
* fix COMPILE_ASSERT and use it in one place.
* Cleanup IL printer output of deopt ids.
Review URL: https://codereview.chromium.org//12871010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20198 260f80e4-7a28-3924-810f-c04153c831b5
Previously we removed dead phis late, in the register allocator. This
change removes them as soon as they are discovered to be dead and packs the
phi array to squeeze out NULLs. This speeds iteration but doesn't save
space because the phi array is zone-allocated.
The PhiIterator is used everywhere to iterate phis except a few places that
need to know the phi index (e.g., SSA construction, phi elimination).
R=vegorov@google.com
Review URL: https://codereview.chromium.org//12340108
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19206 260f80e4-7a28-3924-810f-c04153c831b5
This CL adds AND, OR, XOR and == operations on unboxed 64-bit integers
(aka. mints).
Unboxed mints are stored in xmm registers. Each xmm register location
has an additional bit to keep track of its value representation.
Unboxed mints are materialized on the heap on deoptmization in the same way as
unboxed doubles.
The SSE instructions used are available on all CPUs that support SSE 4.1.
Review URL: https://codereview.chromium.org//10968059
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13112 260f80e4-7a28-3924-810f-c04153c831b5
Add a stack bitmap to the location summaries for calls that are GC
safepoints. The bitmap covers the spill slots. The register
allocator collects these bitmaps into a list and then marks live
pointer values during register allocation. When emitting code for a
call, a heap-allocated stackmap is built.
BUG=
Review URL: https://chromiumcodereview.appspot.com//10831261
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@10618 260f80e4-7a28-3924-810f-c04153c831b5
Bugs fixed in register allocator:
- incorrect assertions in SplitAt;
- allocation finger should not cache positions that are owned by a sibling after split;
- UpdateFreeUntil should allow evicting live range with vreg 0;
- values expected in fixed locations should not cause an interference at the instruction itself, they can be evicted if need arises;
Bug fixed in deoptimization:
- parallel move resolver uses push/pop to free a scratch register for memory to memory moves, when using it for deoptimization we need to ensure that those push/pops do not interfere with actual moves;
R=srdjan@google.com
BUG=
Review URL: https://chromiumcodereview.appspot.com//10824165
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@10287 260f80e4-7a28-3924-810f-c04153c831b5
vegorov@google.com