3fd0e585d3
Fixes bug in far branches on MIPS.
...
Also increases test coverage of far branches on
ARM and MIPS.
R=regis@google.com
Review URL: https://codereview.chromium.org//107293008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@31024 260f80e4-7a28-3924-810f-c04153c831b5
2013-12-10 16:43:06 +00:00
c0ddb83c3b
ARM and MIPS changes which correspond to the initial change submitted in
...
https://codereview.chromium.org/63093003/
R=regis@google.com , zra@google.com
Review URL: https://codereview.chromium.org//62953014
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@30124 260f80e4-7a28-3924-810f-c04153c831b5
2013-11-08 19:40:07 +00:00
aa789a7b27
Merge (x & y) == 0 pattern to emit a single test instruction.
...
This is based on a previous uncommitted CL by vegorov@
(https://codereview.chromium.org/14251023/ ).
It is rebased and fixes a bug in the MIPS implementation: BranchOnCondition
requires the comparison result in fixed registers CMPRES1/CMPRES2.
Remove register alias TMP1 (=TMP) and CMPRES (=CMPRES1). It is confusing to
have them around and easy to forget that they are actually the same.
R=srdjan@google.com , zra@google.com
Review URL: https://codereview.chromium.org//59613005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29966 260f80e4-7a28-3924-810f-c04153c831b5
2013-11-06 12:13:29 +00:00
ca82c461a0
Impelments IfThenElse instruction for ARM and MIPS.
...
R=fschneider@google.com
Review URL: https://codereview.chromium.org//58003003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29933 260f80e4-7a28-3924-810f-c04153c831b5
2013-11-05 20:45:25 +00:00
de1519525c
Reapply "Do not directly load smi constants larger than a 16 bit..."
...
Reapply "Do not directly load smi constants larger than a 16 bit payload on
ia32" with a bugfix. The predicate Assembler::IsSafeSmi incorrectly
returned true for non-smis on non-ia32 platforms.
Original summary: Instead of emitting a large smi constant directly as an
immediate, xor the smi with a random 32-bit cookie at compile time, emit
code to move that into a register and then to xor the register with the
cookie.
Original codereview: https://codereview.chromium.org/48743002/
R=fschneider@google.com
Review URL: https://codereview.chromium.org//51333006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29533 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-30 11:38:39 +00:00
0729948569
Revert "Do not directly load smi constants larger than a 16 bit payload on ia32."
...
There is an assertion failure on debug VM tests.
BUG=
R=fschneider@google.com
Review URL: https://codereview.chromium.org//46873004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29458 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-29 16:49:42 +00:00
adf6560e82
Do not directly load smi constants larger than a 16 bit payload on ia32.
...
Instead of emitting a large smi constant directly as an immediate, xor the
smi with a random 32-bit cookie at compile time, emit code to move that into
a register and then to xor the register with the cookie.
1. In unoptimized code constants are always loaded into a register in
ConstantInstr::EmitNativeCode. Change it to load safely.
2. In optimized code constants loaded into a register for use by an
instruction are loaded by ParallelMoveResolver::EmitMove. Change it to
load safely.
3. In optimized code some instructions allow constants as inputs. These are
reflected with an input location of Location::RegisterOrConstant (or
similar) or else Location::Constant. For the former allocate a register
if the constant is unsafe, and for the latter check for safety before
allowing the constant input.
BUG=https://code.google.com/p/dart/issues/detail?id=1742
R=iposva@google.com , srdjan@google.com
Review URL: https://codereview.chromium.org//48743002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29439 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-29 12:19:12 +00:00
1efeb05d4d
Fixes ARM SIMD IL bug.
...
Issue 14341
R=fschneider@google.com
Review URL: https://codereview.chromium.org//37413002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@29092 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-23 15:56:35 +00:00
d78737298c
Last cleanup int -> intptr_t. Also removed a hack (boolean is not an integer).
...
R=asiva@google.com
Review URL: https://codereview.chromium.org//26345002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@28372 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-08 18:54:00 +00:00
3a8252f90d
Cleanups: int -> intptr_t for "array" lengths, memory sizes.
...
R=asiva@google.com
Review URL: https://codereview.chromium.org//26294002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@28324 260f80e4-7a28-3924-810f-c04153c831b5
2013-10-07 20:19:37 +00:00
8171570100
Fix the previously ineffective assert checking the number of arguments passed to
...
a runtime entry in the VM.
R=asiva@google.com
Review URL: https://codereview.chromium.org//23672011
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@26826 260f80e4-7a28-3924-810f-c04153c831b5
2013-08-28 23:07:14 +00:00
fa2ad38a31
Enables per-function far-branches for ARM and MIPS.
...
R=regis@google.com , srdjan@google.com
Review URL: https://codereview.chromium.org//21363003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25723 260f80e4-7a28-3924-810f-c04153c831b5
2013-08-01 20:51:46 +00:00
8f3e8783f8
Implements the two argument shuffle SIMD instruction for ARM.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//21004011
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25638 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-30 20:49:22 +00:00
42217dc159
Implements far-branches on ARM.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//21159002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25617 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-30 15:33:36 +00:00
22c342637c
Implements Float32x4 and Uint32x4 instructions for ARM.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19978004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25358 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-23 20:02:12 +00:00
af23dfc5b2
Increases the number of ARM floating-point registers.
...
This is to be consistent with VFPv3_D32. Later, we'll detect
VFPv3_D16 at runtime.
R=regis@google.com
Review URL: https://codereview.chromium.org//19806005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25352 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-23 18:25:44 +00:00
dd9adc1a86
Adds more SIMD instructions for ARM.
...
Adds the vnegqs, vabsqs, and vandq instructions.
Also reverts the increase in the number of floating point registers since it is causing crashes on hardware.
R=regis@google.com
Review URL: https://codereview.chromium.org//19493004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25320 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-22 23:26:12 +00:00
4b97f8c18c
Adds reciprocal squre root SIMD instructions for ARM.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19875002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25291 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-22 18:19:44 +00:00
a15bac1044
Adds ARM SIMD instructions.
...
vminqs, maxqs, vrecpeqs (Reciprocal estimate), vrecpsqs (Reciprocal Newton-Raphson step).
R=regis@google.com
Review URL: https://codereview.chromium.org//19773017
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25245 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-19 21:32:03 +00:00
18f6092d52
Implements ARM SIMD comparison instructions.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19678020
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25189 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-18 22:56:45 +00:00
d886c10f6e
Enables a SIMD test for ARM.
...
Required adding the veorq, vmovq, and vdup instructions.
R=regis@google.com
Review URL: https://codereview.chromium.org//19776007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25165 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-18 18:40:27 +00:00
351aaec2c3
Replaces Location::ToStackSlotAddress() with Location::ToStackSlotOffset()
...
This way, Location no longer mentions the architecture specific Address class.
R=regis@google.com
Review URL: https://codereview.chromium.org//19464002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25122 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-17 20:54:34 +00:00
4731ad6b71
Adds the vtbl ARM SIMD instruction.
...
It is needed for the Float32x4ShuffleInstr of the intermediate language.
R=regis@google.com
Review URL: https://codereview.chromium.org//19400003
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25073 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-16 21:18:26 +00:00
3cebda38e6
Merges ARM load/store type enums into one enum.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19256021
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25064 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-16 18:32:40 +00:00
344b295eee
Implements ARM SIMD multiplication and subtraction instructions.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19290006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@25052 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-16 16:13:56 +00:00
f219f81b14
Begins implementation of ARM neon instructions.
...
Just adds the vadd instruction, but also changes the
arm assembler to expose the Q registers rather than the
D registers. Q0 = D1:D0 = S3:S2:S1:S0. This is similar
to how ia32 and x64 use only the xmm registers for
floating point.
R=regis@google.com
Review URL: https://codereview.chromium.org//18684008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24982 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-12 23:22:50 +00:00
20dcf8afaa
Implements OSR for arm and mips.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//19017007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24896 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-10 23:45:18 +00:00
f86d2ec1b4
Adds support for integer division for ARM chips without the sdiv instruction.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//18331006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24635 260f80e4-7a28-3924-810f-c04153c831b5
2013-07-01 17:44:09 +00:00
5eb7e3b03d
Optimize functions containing try-catch on ARM.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//18223010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24615 260f80e4-7a28-3924-810f-c04153c831b5
2013-06-28 23:09:34 +00:00
3711825476
Fix Random_nextState intrinsic on ARM.
...
R=zra@google.com
Review URL: https://codereview.chromium.org//18054006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@24548 260f80e4-7a28-3924-810f-c04153c831b5
2013-06-27 20:16:53 +00:00
264d28744f
Fix decoding of object pool access in code patching on ARM.
...
Fix shift by zero and divide by one on ARM.
Update test status files.
R=zra@google.com
Review URL: https://codereview.chromium.org//16695007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23920 260f80e4-7a28-3924-810f-c04153c831b5
2013-06-12 16:57:06 +00:00
97a881be10
Enable language tests on SIMARM and mark 14 of them as failing.
...
Implement more features on ARM.
R=zra@google.com
Review URL: https://codereview.chromium.org//16244007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23448 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-31 00:38:21 +00:00
77417c2f49
Implement a few more features on ARM.
...
The vm tests byte_array_test and byte_array_optimized_test still fail due to
an inlining bug on ARM.
R=zra@google.com
Review URL: https://codereview.chromium.org//15899010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23370 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-29 23:12:20 +00:00
e5229295a0
Removes ARM mrc instruction.
...
It is a privileged instruction and was only being used in tests
running on the simulator.
R=regis@google.com
Review URL: https://codereview.chromium.org//16194010
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23367 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-29 21:31:27 +00:00
26fa41d1b1
Implements intrinsics for ARM.
...
R=regis@google.com
Review URL: https://codereview.chromium.org//15822008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@23311 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-28 22:55:51 +00:00
53347a3337
Remove stack_frame_<arch>.cc files.
...
The architecture specific information is in stack_frame_<arch>.h files.
R=srdjan@google.com
Review URL: https://codereview.chromium.org//14925005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22470 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-07 18:06:21 +00:00
87ae3bb45f
Allows "Hello, world!" to run on ARM hardware.
...
Also, enables more vm tests on SIMMIPS.
R=regis@google.com
Review URL: https://codereview.chromium.org//14605006
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22344 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-02 22:58:52 +00:00
76c8e61855
Fix ARM memory addressing mode 3 in assembler.
...
Update assembler test.
R=zra@google.com
Review URL: https://codereview.chromium.org//14637013
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@22285 260f80e4-7a28-3924-810f-c04153c831b5
2013-05-01 21:33:08 +00:00
ad6005e5c4
Support debugger API on ARM.
...
Support smull ARM instruction in order to detect 32-bit multiplication overflow.
Enable debugger api tests on ARM.
Enable isolate tests on ARM.
Enable code descriptors tests on ARM.
Enable snapshot tests on ARM.
Enable heap tests on ARM.
Review URL: https://codereview.chromium.org//13983016
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21890 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-23 16:10:22 +00:00
301c572eea
Implement missing features to run Hello world! in checked mode on simulated ARM.
...
Review URL: https://codereview.chromium.org//14192032
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21780 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-19 23:21:07 +00:00
524fbc038b
Implement catch on ARM.
...
Enabled UnhandledExceptions vm test.
Minor clean up.
Review URL: https://codereview.chromium.org//14362008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21708 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-18 22:19:49 +00:00
b37703989f
Implement write barrier on ARM.
...
Enable StoreIntoObject and DartEntry vm tests.
Review URL: https://codereview.chromium.org//13638019
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@21083 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-08 16:44:39 +00:00
46a5dbeb26
Support UseDartApi vm test on ARM.
...
Review URL: https://codereview.chromium.org//13671004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20981 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-05 16:46:53 +00:00
05e2ba9540
Support FrameLookup vm test on ARM, requiring among other things:
...
Maintain a separate top_exit_frame_info for simulated frames and use it to
verify that longjumps are safe.
Make sure unwinding of scopes works in the presence of a simulator.
Support inline allocation of objects.
Support checking of inline cache and instance calls.
Support subtype test cache.
Support (some) equality checks.
Support for (some) conditional branches.
Support for pool pointer setup in stubs.
Review URL: https://codereview.chromium.org//13502002
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20890 260f80e4-7a28-3924-810f-c04153c831b5
2013-04-03 20:17:14 +00:00
b24d57ca66
Support checked mode for VM tests on ARM.
...
Review URL: https://codereview.chromium.org//12773008
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20623 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-28 17:41:35 +00:00
0c27ffc6a4
Implement optional parameter handling in ARM vm.
...
Enable FindCodeObject test on ARM (production mode only for now).
Make sure the object pool is allocated in the old space.
Some more code cleanup on IA32 and X64 (use named constants).
Review URL: https://codereview.chromium.org//12663024
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@20399 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-22 18:30:35 +00:00
6a701789b9
Decode ic data and arguments descriptor passed in calls on ARM.
...
Review URL: https://codereview.chromium.org//12518016
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19827 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-11 23:15:48 +00:00
7766ac76d4
Implement leaf runtime call stub on ARM and corresponding call redirection
...
in ARM simulator.
Implement jump patching on ARM.
Add missing ICache flush calls.
Review URL: https://codereview.chromium.org//12439005
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19724 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-08 21:16:46 +00:00
b95087eb73
Implement native call stub on ARM and native call redirection in ARM simulator.
...
Pass PatchStaticCall test.
Review URL: https://codereview.chromium.org//12629004
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19704 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-08 18:22:14 +00:00
bb71e75ade
Clean up ARM assembly code loading and storing from/to a large offset.
...
Make use of vldm and vstm ARM instructions.
Implement ARM stub printing stop message.
Review URL: https://codereview.chromium.org//12481007
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@19571 260f80e4-7a28-3924-810f-c04153c831b5
2013-03-06 18:49:38 +00:00
zra@google.com