Instead apply the same approach as we do in AOT: unbox based on the
static type information. There are no TFA results available in JIT,
but we could still unbox fields when running in sound null-safety.
TEST=ci
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Change-Id: Ide2e78c6659261ef8d245a4586cf699ea0fbb459
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/256211
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Commit-Queue: Slava Egorov <vegorov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
* Merge ClassTable and SharedClassTable back together;
* Simplify handling of multiple arrays growing in sync;
* Refactor how reload deals with ClassTable.
The last change is the most important because it makes it
much easier to reason about the code. We move away from
copying bits and pieces of the class table and shared
class table into reload contexts.
Having two class table fields in the isolate group makes
it easier to reason about. One field contains program
class table (one modified by kernel loader and accessed
by various program structure cid lookups) and heap
walk class table (used by GC visitors). Normally these
two fields point to the same class table, but during
hot reload we temporary split them apart: original
class table is kept as a heap walk class table, while
program class table is replaced by a clone and updated
by reload.
If reload succeeds we drop original class table and
set program class table as heap walk one.
If reload fails we drop the program class table and
restore original one from heap walk table.
TEST=ci
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Change-Id: I8b66259fcc474dea7dd2af063e4772df99be06c4
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/258361
Commit-Queue: Slava Egorov <vegorov@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
The new implementation is based on suspend/resume stubs and doesn't
use desugaring of async functions on kernel AST.
Previously, new implementation of async/async* was only supported in
AOT mode. This change adds all necessary bits for the JIT mode:
* Suspending variable-length frames (for unoptimized code).
* Handling of Code and pool pointers in Dart stack frames.
* OSR.
* Deoptimization.
* Hot reload.
* Debugger.
The new implementation is not enabled in JIT mode yet.
Design doc: go/compact-async-await.
TEST=ci
Issue: https://github.com/dart-lang/sdk/issues/48378
Change-Id: I477d6684bdce7cbc1edb179ae2271ff598b7dcc5
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/246081
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Johnni Winther <johnniwinther@google.com>
Commit-Queue: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
The CCallInstr takes unboxed word-sized integers and does a call to C
without any VM transitions.
This can be used for the following.
1) Leaf runtime entries. This CL removes the EnterHandleScope,
ExitHandleScope, and AllocateHandle instructions.
2) Compilation of isolate independent code where all definitions in IL
are unboxed integers.
Currently, the CCallInstr expects all it's arguments and the return type
to be word-sized.
This CL also:
- Adds loadImmediate and CCall with a register for each assembler.
- Adds a CSE pass to force-optimized so that LoadThreadInstr gets de-
duplicated.
TEST=tests/ffi(_2)/*
Change-Id: I67c6aaa1b7d6aa7d60e274477686a54e5a331216
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/246240
Reviewed-by: Martin Kustermann <kustermann@google.com>
Commit-Queue: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
(Macro-)assembler helper PushRegistersInOrder generates series of
register pushes in an architecture-specific way:
* Using STMDB on ARM (if possible).
* Using STP on ARM64.
* Updating SP only once on RISC-V.
TEST=ci
Change-Id: I6cbd1dd5f8acf8ce8087ed899a311264a873ad37
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/243100
Commit-Queue: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
The new implementation moves away from desugaring of async
functions on kernel AST, state machine generated in the flow graph and
capturing all local variables in the context.
Instead, async/await is implemented using a few stubs
(InitSuspendableFunction, Suspend, Resume, Return and
AsyncExceptionHandler). The stubs are implemented in a
platform-independent way using (macro-)assembler helpers.
When suspending a function, its frame is copied into a SuspendState
object, and when resuming a function it is copied back onto the stack.
No extra code is generated for accessing local variables.
Callback closures are created lazily on the first await.
Design doc: go/compact-async-await.
Part 1 (kernel): https://dart-review.googlesource.com/c/sdk/+/241842
TEST=ci
Issue: https://github.com/dart-lang/sdk/issues/48378
Change-Id: Ibad757035b7cc438ebdff80b460728b1d3eff1f5
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/242000
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
- Fixes SIMD registers clobbered by write barrier on ARM64.
- Moves code generation out of non-compiler directory.
- Removes unnecessary building of Dart frames on leaf runtime calls.
- Removes unnecessary Threads slots for write barrier Code objects.
- Removes duplicate saves of SP in leaf runtime calls on ARM64 and RISC-V.
- Avoids some redundant SP updates on RISC-V.
TEST=ci
Change-Id: Idb92127658edc90b320923ef3d882a7219a450ae
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/236842
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Implements a backend targeting RV32GC and RV64GC, based on Linux standardizing around GC. The assembler is written to make it easy to disable usage of C, but because the sizes of some instruction sequences are compile-time constants, an additional build configuration would need to be defined to make use of it.
The assembler and disassembler cover every RV32/64GC instruction. The simulator covers all instructions except accessing CSRs and the floating point state accessible through such, include accrued exceptions and dynamic rounding mode.
Quirks:
- RISC-V is a compare-and-branch architecture, but some existing "architecture-independent" parts of the Dart compiler assume a condition code architecture. To avoid rewriting these parts, we use a peephole in the assembler to map to compare-and-branch. See Assembler::BranchIf. Luckily nothing depended on taking multiple branches on the same condition code set.
- There are no hardware overflow checks, so we must use Hacker's Delight style software checks. Often these are very cheap: if the sign of one operand is known, a single branch is needed.
- The ranges of RISC-V branches and jumps are such that we use 3 levels of generation for forward branches, instead of the 2 levels of near and far branches used on ARM[64]. Nearly all code is handled by the first two levels with 20-bits of range, with enormous regex matchers triggering the third level that uses aupic+jalr to get 32-bits of range.
- For PC-relative calls in AOT, we always generate auipc+jalr pairs with 32-bits of range, so we never generate trampolines.
- Only a subset of registers are available in some compressed instructions, so we assign the most popular uses to these registers. In particular, THR, TMP[2], CODE and PP. This has the effect of assigning CODE and PP to volatile registers in the C calling convention, whereas they are assigned preserved registers on the other architectures. As on ARM64, PP is untagged; this is so short indices can be accessed with a compressed instruction.
- There are no push or pop instructions, so combining pushes and pops is preferred so we can update SP once.
- The C calling convention has a strongly aligned stack, but unlike on ARM64 we don't need to use an alternate stack pointer. The author ensured language was added to the RISC-V psABI making the OS responsible for realigning the stack pointer for signal handlers, allowing Dart to leave the stack pointer misaligned from the C calling convention's point of view until a foreign call.
- We don't bother with the link register tracking done on ARM[64]. Instead we make use of an alternate link register to avoid inline spilling in the write barrier.
Unimplemented:
- non-trivial FFI cases
- Compressed pointers - No intention to implement.
- Unboxed SIMD - We might make use of the V extension registers when the V extension is ratified.
- BigInt intrinsics
TEST=existing tests for IL level, new tests for assembler/disassembler/simulator
Bug: https://github.com/dart-lang/sdk/issues/38587
Bug: https://github.com/dart-lang/sdk/issues/48164
Change-Id: I991d1df4be5bf55efec5371b767b332d37dfa3e0
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/217289
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
Commit-Queue: Ryan Macnak <rmacnak@google.com>
When ffi code calls Dart code that requests the isolate to exit(via Isolate.exit, for example), we ensure that isolate indeed exits on return from ffi call.
This is implemented by introduction of new safepoint bit which, once set, forces ExitSafepoint to propagate unwind error.
TEST=isolate_exit_sandwich_test
Change-Id: I2e8f5ecec7f4e59ae5f99b9525cc566f20d4b6a8
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/219846
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
Commit-Queue: Alexander Aprelev <aam@google.com>
This CL changes the handling of late static fields to be similar to the
handling of late instance fields. That is, if the field does not need a
load guard and has an initializer, the new InitLateStaticField and
InitLateFinalStaticField stubs are used, which directly call the
initializer function instead of going to the runtime. Thus, the only
runtime call left in these cases is when a late final static field is
modified by the initializer function, in which case an appropiate
exception is thrown.
In the case where a late static field might call the initializer
function but no initializer exists, a LateInitializationErrorSlowPath is
generated to be called if the field value is the sentinel, also similar
to the late instance field case.
TEST=Refactoring, so existing tests.
Change-Id: I95887022d8ece1164a8f7c34b77d9de8c53aa898
Bug: https://github.com/dart-lang/sdk/issues/45138
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/220009
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Every AOT user out there has been using bare instructions mode
and continuing to maintaining non-bare instructions mode simply
adds costs (both in terms of time spent making changes to work
in a mode that is not used and CI resources spent on testing it).
This change removes FLAG_use_bare_instructions and changes the code
to assume that FLAG_precompiled_mode implies bare instructions.
TEST=ci
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Change-Id: I5032b13bfcb613f79865f2cfa139cca8d1b42556
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/220964
Commit-Queue: Slava Egorov <vegorov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
This is a reland of 1016bbadde
The broken benchmarks causing the revert were not due to this CL.
TEST=vm/cc/TTS
Original change's description:
> [vm/compiler] Add more checks in TTSes for uninstantiated types.
>
> In certain cases, optimized type testing stubs for uninstantiated types
> compare the instantiation of the type arguments for the type against the
> corresponding instance type arguments. Previously, only an identity
> check was generated, so the instantiation had to match the instance type
> argument exactly.
>
> This CL adds checks for the following cases:
> * The instantiated type argument is dynamic, void, or Object.
> * The instance type argument is Null or Never.
>
> When strong null safety is enabled, we also check that the the instance
> type argument is legacy or non-nullable when the instantiated type
> argument is non-nullable Object or that the instantiated type argument
> is nullable or legacy when the instance type argument is Null.
>
> This CL also adds handling for the case where the instantiated or
> instance type argument is not a Type, which is necessary for safely
> retrieving the type class id and nullability, and allocates some
> additional registers in TTSInternalRegs for storing type arguments. On
> ARM7, this requires pushes/pops around type argument checking, because
> we've run out of registers there.
>
> Fixes https://github.com/dart-lang/sdk/issues/40736
>
> TEST=vm/cc/TTS
>
> Bug: https://github.com/dart-lang/sdk/issues/46920
> Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-release-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-nnbd-linux-release-x64-try,vm-kernel-nnbd-linux-release-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try
> Change-Id: Ib8498fd2b9593b4abb92111f062ed2fc95a45c16
> Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/210681
> Commit-Queue: Tess Strickland <sstrickl@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
Bug: https://github.com/dart-lang/sdk/issues/46920
Change-Id: Id84730b3bb292ea7fdfe9ebd8b1fc6e71c64cf22
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/211901
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
In dependent CL, const maps and sets can be shared between isolates in
the same isolate group before the index is lazily populated. To prevent
one isolate from seeing a non-null index pointer, while not all writes
to the index itself are visible to the isolate (the mutator thread of
that isolate), we use a store release barrier on arm architectures.
This CL adds a store release barrier option to the StoreInstanceField
instruction to be used in the dependent CL.
Even though there is no barrier on x64 and ia32, we still also use the
option on these architectures because on x64 we signal the barrier to
TSAN.
The stlr instruction on arm64 does not feature an address operand.
Therefore we need to branch in the assembler on whether we're using
a store-release before we construct an Address.
Design doc: go/dart-vm-const-maps
TEST=Dependent CL, split off for ease of reviewing.
Bug: https://github.com/dart-lang/sdk/issues/45908
Change-Id: I6563aa3c813319a23e815b862ca5caabb805dc9e
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/210726
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Tess Strickland <sstrickl@google.com>
This reverts commit 1016bbadde.
Reason for revert: Broken benchmarks on golem.
Original change's description:
> [vm/compiler] Add more checks in TTSes for uninstantiated types.
>
> In certain cases, optimized type testing stubs for uninstantiated types
> compare the instantiation of the type arguments for the type against the
> corresponding instance type arguments. Previously, only an identity
> check was generated, so the instantiation had to match the instance type
> argument exactly.
>
> This CL adds checks for the following cases:
> * The instantiated type argument is dynamic, void, or Object.
> * The instance type argument is Null or Never.
>
> When strong null safety is enabled, we also check that the the instance
> type argument is legacy or non-nullable when the instantiated type
> argument is non-nullable Object or that the instantiated type argument
> is nullable or legacy when the instance type argument is Null.
>
> This CL also adds handling for the case where the instantiated or
> instance type argument is not a Type, which is necessary for safely
> retrieving the type class id and nullability, and allocates some
> additional registers in TTSInternalRegs for storing type arguments. On
> ARM7, this requires pushes/pops around type argument checking, because
> we've run out of registers there.
>
> Fixes https://github.com/dart-lang/sdk/issues/40736
>
> TEST=vm/cc/TTS
>
> Bug: https://github.com/dart-lang/sdk/issues/46920
> Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-release-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-nnbd-linux-release-x64-try,vm-kernel-nnbd-linux-release-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try
> Change-Id: Ib8498fd2b9593b4abb92111f062ed2fc95a45c16
> Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/210681
> Commit-Queue: Tess Strickland <sstrickl@google.com>
> Reviewed-by: Alexander Markov <alexmarkov@google.com>
TBR=kustermann@google.com,alexmarkov@google.com,sstrickl@google.com
Change-Id: I8c2368cbbb3d23aa2d0cb4788737d9b737318bb7
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Bug: https://github.com/dart-lang/sdk/issues/46920
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Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/211860
Reviewed-by: Tess Strickland <sstrickl@google.com>
Commit-Queue: Tess Strickland <sstrickl@google.com>
In certain cases, optimized type testing stubs for uninstantiated types
compare the instantiation of the type arguments for the type against the
corresponding instance type arguments. Previously, only an identity
check was generated, so the instantiation had to match the instance type
argument exactly.
This CL adds checks for the following cases:
* The instantiated type argument is dynamic, void, or Object.
* The instance type argument is Null or Never.
When strong null safety is enabled, we also check that the the instance
type argument is legacy or non-nullable when the instantiated type
argument is non-nullable Object or that the instantiated type argument
is nullable or legacy when the instance type argument is Null.
This CL also adds handling for the case where the instantiated or
instance type argument is not a Type, which is necessary for safely
retrieving the type class id and nullability, and allocates some
additional registers in TTSInternalRegs for storing type arguments. On
ARM7, this requires pushes/pops around type argument checking, because
we've run out of registers there.
Fixes https://github.com/dart-lang/sdk/issues/40736
TEST=vm/cc/TTS
Bug: https://github.com/dart-lang/sdk/issues/46920
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Change-Id: Ib8498fd2b9593b4abb92111f062ed2fc95a45c16
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/210681
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
datastream.h is included in places where we cannot import the compiler
namespace, so we can't make compiler::target::word the type of
WriteTargetWord. That also would possibly silently truncate a
host-word sized value that was passed in instead of alerting to a
possible issue if those bits were important.
However, just using IsInt fails if the value being passed in is
a compiler::target::uword that is larger than the max value
that fits in a compiler::target::word. Instead, check for
truncation by checking the bit length of the value, which works
for both signed and unsigned target word values.
Original description:
Also remove previous (incorrect) uses in datastream.cc and
image_snapshot.cc, now that Utils::IsInt<T>(N, value) can now
be run for values of N >= sizeof(T).
Fixes https://github.com/dart-lang/sdk/issues/46572
TEST=language/generic/super_bounded_types_test passes on NNBD simarm,
added value that triggered failure to vm/cc/MagnitudeIsUint
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Change-Id: Idbfdda9f28243d206d482a1d9ac7ae76a5022ad2
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/206201
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Commit-Queue: Tess Strickland <sstrickl@google.com>
Also remove previous (incorrect) uses in datastream.cc and
image_snapshot.cc, now that Utils::IsInt<T>(N, value) can now
be run for values of N >= sizeof(T).
Fixes https://github.com/dart-lang/sdk/issues/46572
TEST=language/generic/super_bounded_types_test passes on NNBD simarm,
added value that triggered failure to vm/cc/MagnitudeIsUint
Cq-Include-Trybots: luci.dart.try:vm-kernel-nnbd-linux-release-simarm-try
Change-Id: Ibc2d2bb5037a8fdee11fc26fa2a313149d3ca274
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/206083
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Daco Harkes <dacoharkes@google.com>
This relands https://dart-review.googlesource.com/c/sdk/+/205633
but without renaming TARGET_OS_IPHONE to DART_TARGET_OS_IPHONE.
It also changes uses of TARGET_OS_IOS to
DART_TARGET_OS_MACOS_IOS to be consistent with the rest of the
VM.
TargetConditionals.h for XCode 13 defines several
TARGET_OS_* preprocessor symbols that confuse the
Dart build. There is probably a more targeted fix
for this, but renaming the symbols that Dart uses
will also prevent this problem if more symbols
are added to the platform headers in the future.
See: https://github.com/dart-lang/sdk/issues/46499
TEST=It builds.
Change-Id: Ie775c19dd23cfdf5f65e5ebc6ee4ec3a561676fa
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/205860
Commit-Queue: Zach Anderson <zra@google.com>
Reviewed-by: Alexander Aprelev <aam@google.com>
TargetConditionals.h for XCode 13 defines several
TARGET_OS_* preprocessor symbols that confuse the
Dart build. There is probably a more targeted fix
for this, but renaming the symbols that Dart uses
will also prevent this problem if more symbols
are added to the platform headers in the future.
See: https://github.com/dart-lang/sdk/issues/46499
TEST=It builds.
Change-Id: I3b33a03b4a9a14b76d55fe12f8cdefec4b3c3664
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/205633
Commit-Queue: Zach Anderson <zra@google.com>
Reviewed-by: Siva Annamalai <asiva@google.com>
Adding this representation allows us to create slots for storing
and retrieving values from uint16_t-typed object fields in the runtime.
Also generalize BoxUint8Instr to BoxSmallIntInstr, which holds any
unboxed integer representation where the value is guaranteed to fit
into a Smi.
To unify the implementation of BoxSmallIntInstr across architectures,
we add ExtendValue(Register dst, Register src, OperandSize sz), which
extends the sz-sized value in src to a full register size in dst. If
sz is a signed OperandSize, then the resulting value is sign
extended appropriately.
We also add MoveAndSmiTagRegister / ExtendAndSmiTagValue, which is like
the base operation but also tags the value as a Smi. On some
architectures, this can be performed using a single instruction.
Also adds sbfx/ubfx on ARM for use in ExtendValue.
TEST=Existing tests for BoxSmallIntInstr, followup CL for the new
representation.
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-x64-try,vm-kernel-linux-debug-x64c-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64c-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-reload-linux-debug-x64-try,vm-kernel-reload-rollback-linux-debug-x64-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-precomp-linux-debug-simarm64c-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-linux-debug-simarm64c-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try,vm-precomp-ffi-qemu-linux-release-arm-try
Change-Id: I9c0b3a23f5e28480e0bfbde55b9494f7b822dcfa
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/203761
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
With this change, allocation instructions can now be direct inputs to
other allocation instructions, so the redundancy eliminator is extended
to handle this possibility.
Methods for working with instruction input-related slots are added to
subclasses of AllocationInstr, so that the redundancy eliminator can be
written more generically in places, instead of needing to add cases for
new allocation instructions and/or instruction inputs.
Code size different in Flutter gallery (release-sizeopt):
* ARM7: Total -0.30%, instructions -0.41%
* ARM8: Total -0.31%, instructions -0.47%
TEST=Current test suite.
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-linux-debug-simarm64c-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64c-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-linux-release-simarm64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-x64-try,vm-kernel-linux-debug-x64c-try
Change-Id: Idc1aa2a1cb8c0c62f0bcb64aee89a7525dd3d1e1
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/198406
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Slava Egorov <vegorov@google.com>
Now AllocateClosureInstr takes the closure function as a Value* instead
of as a const Function&, a new kFunctionReg is added to
AllocateClosureABI, and the AllocateClosure stub sets the closure
function internally instead of initializing it to null and requiring it
to be set post-allocation.
A convenience method known_function() is added to AllocateClosureInstr
which returns either the closure function, if known at compile time,
or null otherwise.
TEST=More refactorings, so just passing current tests.
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-linux-debug-simarm64c-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64c-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-linux-release-simarm64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-x64-try,vm-kernel-linux-debug-x64c-try
Change-Id: If843b401e0f282b191dd60b1c6c73c01f1d5bc70
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/198285
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Also create a subclass of AllocationInstr, AllocateClosureInstr,
which is used when allocating closures.
Followup CLs add inputs to this instruction and to the AllocateClosure
stub, starting with the closure function. Adding these inputs allows
the related field to be set within the stub, instead of using
StoreInstanceField manually at each closure allocation point.
Since this CL only adds the initial stub/instruction implementation,
the overhead on snapshots is minimal: just the addition of the new
stub to each isolate.
-----
This CL also adds virtual and non-virtual methods to assembler_base.h
revolving around field loads and stores and attempted inline object
allocation, to ensure all architectures have these methods.
It also adds LoadFromSlot/StoreToSlot/StoreToSlotNoBarrier, which
appropriately calls one of the other methods based on whether the slot
is compressed or not and whether it is a boxed or unboxed field.
With these additions, the AllocateClosure stub generator can be defined
in an architecture-independent way.
TEST=Basically a refactoring, so check using current test suites.
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-linux-debug-simarm64c-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64c-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-linux-release-simarm64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-x64-try,vm-kernel-linux-debug-x64c-try
Change-Id: I71f5691307679f8d5e3604007699de4706f86eb8
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/198284
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
The optimizing compiler can insert box instructions at various places
during the optimization pipeline. There is no guarantee that a box
instruction will get a proper (deopt-id, deopt-env) assigned to it - in
many places it will not.
Furthermore StoreInstanceField's into "unboxed fields" might cause
box allocations to happen. Those stores might also not have deopt
information associated with them.
In general we require stackmaps when allocation slow paths go to runtime
and cause GC. If GC throws OOM we theoretically would also need deopt
information in order to populate correct catch-entry state. Though OOM
is uncommon and the VM could decide to ignore the top-frame - if it's
missing deopt information - since box allocations aren't something
users are in control of (as opposed to user-allocated objects inside
try/catch).
=> This CL makes box allocations go to a runtime entry that doesn't
support lazy-deopt. While being in those runtime entries the mutators
will also not participate in "deopt safepoint operation" requests.
Issue https://github.com/dart-lang/sdk/issues/45213
TEST=Existing test suite.
Change-Id: I1b61f77e3166da82efad08bb49bc1756576d220c
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/196928
Commit-Queue: Martin Kustermann <kustermann@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
This extends the existing safepoint operation mechanism by allowing to
perform two different operations:
* "gc safepoint operations": All mutators are stopped at places where
it's safe to GC. It therefore requires stackmaps to be available for
all optimized mutator frames.
* "deopt safepoint operations": All mutators are stopped at places
where it's safe to GC, but also safe to lazy-deopt mutator frames.
It therefore requires deopt-id/deopt-info to be available for all
optimized mutator frames.
Mutators can be asked to block for any of those two safepoint operations.
If a mutator is at a place where its safe to GC it will respond to "gc
safepoint operations" requests, if a mutator is additionally at a place
where it's also safe to lazy-deopt it will respond to "deopt safepoint
operation" requests.
Depending on how the runtime was entered (which is tracked via the
[Thread::runtime_call_deopt_ability_] value) - the mutator might
participate in both or only in gc safepoint operations.
During the start of a "deopt safepoint operation", the safepoint handler
will request all threads to stop at a "deopt safepoint". Some threads
might first want to initiate their own "gc safepoint operation"
(e.g. due to allocation failure) before they reach a "deopt safepoint".
We do allow this by letting the safepoint handler own a "deopt safepoint
operation" but still participate in other thread's "gc safepoint
operation" requests until all mutators are checked into places where
it's safe to lazy-deopt at which point the "deopt safepoint operation"
also owns a "gc safepoint operation".
In order to facilitate this, the Thread's safepoint_state will be
extended to consist of the following bits:
* AtSafepoint
* SafepointRequested
* AtDeoptSafepoint
* DeoptSafepointRequested
* BlockedForSafepoint
Issue https://github.com/dart-lang/sdk/issues/45213
TEST=vm/cc/SafepointOperation_*
Change-Id: Icdc2827718f6780818f99b829a5e806d6bb5b130
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/196927
Commit-Queue: Martin Kustermann <kustermann@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Also creates LoadFromOffset/StoreToOffset variants across all
architectures (was missing in some) that take the register to
load to/store from, the memory address, and the size to load/store.
Fixes LoadFromOffset on X64 to use MOVSXD when the size is kFourBytes.
Creates slots for the data field of TypedDataBase/Pointer objects
and replaces the StoreUntagged instruction with uses of
StoreInstanceField instead to create uses of the new version of
the instruction.
BUG=https://github.com/dart-lang/sdk/issues/42793
TEST=Tests that involve FFI pointers or TypedData constructors.
Cq-Include-Trybots: luci.dart.try:vm-kernel-precomp-linux-debug-simarm64c-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-linux-debug-x64c-try,vm-kernel-precomp-linux-product-x64-try,vm-kernel-precomp-linux-release-x64-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try,vm-kernel-linux-product-x64-try,vm-kernel-linux-release-simarm64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-x64-try,vm-kernel-linux-debug-x64c-try
Change-Id: I2c96e83bb086aa93c56b834e809e7141a32cfc35
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/196924
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Daco Harkes <dacoharkes@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Currently we have things called XPtr which are not what you get from ptr().
Old world:
handle->raw() returns RawObject* (tagged)
raw_obj->ptr() returns RawObject* (untagged)
After 6fe15f6df9:
handle->raw() returns ObjectPtr
obj_ptr->ptr() returns ObjectLayout*
New world:
handle->ptr() returns ObjectPtr
obj_ptr->untag() returns UntaggedObject*
TEST=ci
Change-Id: I6c7f34014cf20737607caaf84979838300d12df2
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/149367
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Siva Annamalai <asiva@google.com>
Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
Assembler now always knows whether LR contains return address
or can be safely cloberred.
TEST=tested through normal test suite
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Change-Id: I0b436509389cfd29ee413fd28930fb2d6b07616e
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/174468
Commit-Queue: Vyacheslav Egorov <vegorov@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
An address containing an object header is sometimes interpreted as a object slot due to array truncation and concurrent marking/sweeping. Always accessing it as a word assuages TSAN that it won't be subject to tearing, and allows for the removal of TSAN suppressions from header access. In turn, this will allow TSAN to verify some acquire/release header accesses.
TEST=tsan
Bug: https://github.com/dart-lang/sdk/issues/44091
Change-Id: I7bf6449bf7dfeabd9db76e4bb37456e3be2d5124
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/172861
Commit-Queue: Ryan Macnak <rmacnak@google.com>
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
This CL extends SubtypeTestCache entries with an additional slot that
contains the type being checked, to allow for future uses where
different runtime types can flow through a single checkpoint. This
change is separated from those future uses to determine the impact of
these changes only.
Thus, most SubtypeTestCache checks require the type as an additional
argument, and now the destination type register in TypeTestABI is now
untouched in SubtypeTestCache checks. Since there are currently no plans
for a dynamic InstanceOf test, the one argument SubtypeTestCache is left
unchanged.
Until we add cases in later CLs where the type can differ at the same
AssertAssignable instruction, we could check the type last since it is
currently guaranteed to be the same each time. However, we instead check
it after the instance, which is when it should be checked once we have
AssertAssignable instructions with types only known at runtime. This
avoids having to change it later, but also ensures the measured impact
of these changes can be compared to the impact of later changes.
In addition, this CL also unifies most of the code used by
GenerateInstanceOf (and also GenerateAssertAssignable via
GenerateInlineInstanceof on IA32). This is possible since register use
changes in the helper functions has eliminated the need to push the
instantiator and function type argument registers from TypeTestABI on
non-X64 architectures. By unifying these methods, we ensure that all
architectures appropriately set TypeTestABI::kDstTypeReg when necessary.
TEST=Existing tests on all architectures, change in object_test.cc.
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-x64-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try
Change-Id: I5d56de156e175758b3299ef1c776b848ac11f779
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/172503
Reviewed-by: Régis Crelier <regis@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
The only architecture-specific part of type testing stubs (TTS) is which
registers get saved/restored across SubtypeTestCache stub calls in the
slow TTS implementation, which is now a register mask constant in the
TypeTestABI struct.
This CL also:
* Creates a single definition of OperandSize in assembler_base.h. Moves
OperandSize into the compiler namespace. assembler_base.h. Renames
constants common to all architectures to neutral names (e.g., kWord =>
kFourBytes), since "word" has different meanings across architectures.
* Creates a new JumpDistance enum for kNearJump/kFarJump in
AssemblerBase and replace existing bool uses with the constants.
* Adds JumpDistance arguments to some of the generalized Assembler
methods so they aren't forced to use far jumps on IA32/X64. These
added JumpDistance arguments are ignored on ARM architectures.
* Adds a new generalized Assembler::LoadIndexedPayload method for
loading indexed objects out of post-header variable-length payloads.
* Moved the OperandSize argument for LoadForOffset and similar methods
on 32-bit ARM from being the first argument to being the second to
last argument just to match other architectures, and to allow it to
have a default value of kFourBytes.
TEST=Run on trybots of all architectures.
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-x64-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try
Change-Id: Ia930613e96db4d1ab324c5a355dca8994d2a77f0
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/172160
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
The differences between the different implementations are very
minor, so abstract out the few that remain into Assembler:
* Change Load<X>FromPoolOffset to Load<X>FromPoolIndex and do pool
offset calculations internally, since all caller sites have the pool
index. (Especially important because the pool register is tagged on
X64 and ARM and untagged on ARM64, so this abstracts that away.)
* Add default for pool register argument on ARM, since ARM64 already had
one and X64 doesn't take a pool register argument.
Other changes:
* Use specific TestTypeABI registers within the helper method that adds
caller-side checks instead of passing registers as arguments and
document which registers are used for input or output (and when, if
they are used conditionally).
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-x64-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try
Change-Id: Ifc7a0eaa6aacf7f629aa9647b028500648af653d
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/167803
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
These checks are now performed in the dynamic closure call dispatcher.
To avoid having to create type argument vectors (TAVs) for default type
arguments at runtime, we cache a compile-time created TAV in the
ClosureData for the closure function which is retrieved by the
dispatcher when needed.
We also keep an associated packed field of information that can also be
determined at compile time:
* Whether the cached TAV needs instantiation or can share its
instantiator or function type arguments.
* The number of parent type parameters.
The former allows the generated IL to keep the invariant that the
InstantiateTypeArguments instruction (and the runtime entry it calls) is
only used for uninstantiated TAVs.
Also changes the destination name to an Value input for the
AssertSubtype instruction and adds handling for non-constant types and
names in that instruction's backend.
Additional changes:
* Adds new slots for ClosureData, Function, and TypeArguments.
* Adds a new kUnboxedUint8 representation (needed for
TypeParameterLayout::flags_, which is of type uint8_t).
* Extends LoadField to handle uint8_t unboxed native fields.
* Adds BoxUint8 for boxing unboxed uint8_t values.
Code size impact on Flutter gallery in release mode:
* arm7: total +0.08%, vmisolate: +0.56%, isolate: +0.42%,
readonly: -0.04%, instructions: -0.03%
* arm8: total +0.12%, vmisolate: +0.56%, isolate: +0.42%,
readonly: -0.002%, instructions: +0.03%
Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try,vm-kernel-nnbd-linux-debug-ia32-try,vm-kernel-nnbd-linux-debug-x64-try,vm-kernel-precomp-linux-debug-simarm_x64-try,vm-kernel-precomp-linux-debug-x64-try,vm-kernel-precomp-nnbd-linux-debug-simarm_x64-try,vm-kernel-precomp-nnbd-linux-debug-x64-try,vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-precomp-linux-release-simarm-try,vm-kernel-precomp-linux-release-simarm64-try,vm-kernel-precomp-nnbd-linux-release-simarm64-try
Bug: https://github.com/dart-lang/sdk/issues/40813
Change-Id: I5a7de27a17e3119e27752bd0d10e1c6bc1b52a16
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/158844
Commit-Queue: Tess Strickland <sstrickl@google.com>
Reviewed-by: Martin Kustermann <kustermann@google.com>
Reviewed-by: Régis Crelier <regis@google.com>
Right now we assign class ids to top-level classes, abstract classes as
well as concrete classes. All of them have allocated from a 16-bit pool
of ids. The VM FATAL()s once it hits that limit.
Customers who run very large programs (significant amount of generated
code) on the Dart VM have started to hit this 16-bit class limit.
Concrete classes can have instances in the heap. Our current heap layout
only allows 16-bit class ids to be encoded in the header word. To avoid
increasing the size of heap objects or shrinking the size of the identity
hash code to 16-bit we keep class ids in object headers to be 16-bit.
Abstract classes cannot have instances in the heap. Though their class
ids are encoded in type objects. Furthermore we sort classes in
AOT/AppJIT mode to perform fast class-id range checks. To avoid impacting
this optimization we treat abstract classes the same way as concrete
classes.
Top-level classes cannot have instances in the heap. Their class ids are
only used in the runtime code, for example for hot-reload as well as
part of the service protocol.
=> We can allocate class ids outside the 16-bit range for top-level
classes, thereby freeing a significant amount of space in the 16-bit
range.
This CL does exactly that: We change classid_t to be int32_t. The
ClassLayout::id_ can now be assigned ids outside 16-bit range for
top-level classes. To do this we keep dart classes and top level classes
as separate arrays in the ClassTable.
Issue https://github.com/dart-lang/sdk/issues/42533
See also b/160229360
Change-Id: I6710a644e7b0ab2d4f4c792bef8e1f91cb117421
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/153607
Commit-Queue: Martin Kustermann <kustermann@google.com>
Reviewed-by: Ryan Macnak <rmacnak@google.com>
Vyacheslav Egorov