Commit Graph

7 Commits

Author SHA1 Message Date
vegorov@google.com 1bd5a9b414 Skeleton of a linear scan register allocator.
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com//10696151

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9563 260f80e4-7a28-3924-810f-c04153c831b5
2012-07-11 18:52:17 +00:00
srdjan@google.com e801021a27 Cleanups.
Review URL: https://chromiumcodereview.appspot.com//10765007

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9482 260f80e4-7a28-3924-810f-c04153c831b5
2012-07-09 20:31:25 +00:00
fschneider@google.com a411bf5045 Add forward iterator to iterate instructions inside a basic block.
It is currently only used in SSA renaming.
Review URL: https://chromiumcodereview.appspot.com//10692107

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9438 260f80e4-7a28-3924-810f-c04153c831b5
2012-07-06 12:31:37 +00:00
fschneider@google.com eba7136e7b Make IL instructions a doubly-linked list within basic blocks.
In order to be able to efficiently iterate backwards over instructions
and removing or replacing instructions in the graph we want them to
be a double-linked list inside basic blocks. The list has the following

1. Block entry instructions do not have a previous instruction.
2. The last instruction in a block may or may not have a next instruction:
   - Branches have a NULL-successor.
   - Normal block exits have a block entry instructions as successor.

This CL also makes the accessor for previous and next instruction in this
list non-virtual. This avoidis the current code duplication there.
Review URL: https://chromiumcodereview.appspot.com//10665022

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9297 260f80e4-7a28-3924-810f-c04153c831b5
2012-07-02 16:08:58 +00:00
vegorov@google.com 30288c500e Fix a bug in liveness analysis code and add more comments.
R=fschneider@google.com
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com//10657044

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9106 260f80e4-7a28-3924-810f-c04153c831b5
2012-06-26 12:14:02 +00:00
vegorov@google.com 2f23dc4b60 Simple iterative liveness analysis over SSA.
R=fschneider@google.com
BUG=
TEST=

Review URL: https://chromiumcodereview.appspot.com//10666026

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9069 260f80e4-7a28-3924-810f-c04153c831b5
2012-06-25 17:07:16 +00:00
fschneider@google.com 63d4ad7d5f Add new files and data structures for the new register allocator.
This CL adds new files to hold the new register allocator and
adds a parallel-move instructions that will be used to insert
moves for register constraints, spills and phi-resolution.

No new functionality added yet.
Review URL: https://chromiumcodereview.appspot.com//10635020

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9027 260f80e4-7a28-3924-810f-c04153c831b5
2012-06-22 10:59:06 +00:00