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20 Commits

Author SHA1 Message Date
johnmccutchan@google.com 9fb0984c9d SSE Assembler + Linux build fixes 
Review URL: https://codereview.chromium.org//12223115

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@18493 260f80e4-7a28-3924-810f-c04153c831b5
 2013-02-13 23:05:17 +00:00
johnmccutchan@google.com dd140c2958 Revert SSE assembler changes 
Review URL: https://codereview.chromium.org//12212151

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@18410 260f80e4-7a28-3924-810f-c04153c831b5
 2013-02-12 23:14:12 +00:00
johnmccutchan@google.com 06eb49d537 SSE Assembler and Disassembler support 
Review URL: https://codereview.chromium.org//12207117

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@18406 260f80e4-7a28-3924-810f-c04153c831b5
 2013-02-12 22:43:48 +00:00
srdjan@google.com 40a7130741 Inline Doubles truncate and round. 
Review URL: https://codereview.chromium.org//11573044

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@16983 260f80e4-7a28-3924-810f-c04153c831b5
 2013-01-11 20:42:47 +00:00
fschneider@google.com b38daebd36 Faster 64-bit left-shift for ia32. 
This CL adds a fast left-shift that operates on unboxed mints.
(64-bit integers) to the ia32 optimizing compiler.
Review URL: https://codereview.chromium.org//11085004

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13408 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-09 11:59:44 +00:00
fschneider@google.com 3efefbd582 Faster 64-bit right-shift for the ia32 compiler. 
Review URL: https://codereview.chromium.org//11027060

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13295 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-05 14:42:00 +00:00
fschneider@google.com f60ebcc5fb Add fast 64-bit bitwise negation to the IA32 optimizing compiler. 
Review URL: https://codereview.chromium.org//11043020

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13221 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-04 12:01:12 +00:00
fschneider@google.com cb719805d8 Add fast 64-bit integer ADD and SUB to the optimizing compiler. 
They operate on unboxed 64-bit integers stored in xmm registers.

I also fixed an issue with some SSE 4 specific assembler
tests where we hit an assert with an empty assembler buffer
when running with --no-use-sse41.
Review URL: https://codereview.chromium.org//11016028

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13211 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-04 08:50:28 +00:00
srdjan@google.com 2693f662aa Fix movmskpd test, add masking to result. 
Review URL: https://codereview.chromium.org//11049013

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13154 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-02 23:49:30 +00:00
fschneider@google.com 6632f191c4 Support for unboxed 64-bit integer bitwise operations and equality on ia32. 
This CL adds AND, OR, XOR and == operations on unboxed 64-bit integers
(aka. mints).

Unboxed mints are stored in xmm registers. Each xmm register location
has an additional bit to keep track of its value representation.

Unboxed mints are materialized on the heap on deoptmization in the same way as
unboxed doubles.

The SSE instructions used are available on all CPUs that support SSE 4.1.
Review URL: https://codereview.chromium.org//10968059

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@13112 260f80e4-7a28-3924-810f-c04153c831b5
 2012-10-02 11:25:53 +00:00
vegorov@google.com 5f9ff89e0a Add support for WritableRegister policy in the register allocator. 
Use it to eliminate push/pop on the fast path of the write barrier.

Tighten assertions in StoreIntoObject to ensure that value register is not equal to object register. Current code can't cope with that.

BUG=

Review URL: https://chromiumcodereview.appspot.com//10909169

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@12193 260f80e4-7a28-3924-810f-c04153c831b5
 2012-09-11 12:50:52 +00:00
vegorov@google.com 1911b2bc81 Make register allocator to disregard constant computation with no uses. 
Inline constant values into environments, instead of creating a use of the constant definition.

Change BinarySmiOpComp code template to allow inline constant uses for the right hand side.

R=fschneider@google.com
BUG=

Review URL: https://chromiumcodereview.appspot.com//10916082

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@11798 260f80e4-7a28-3924-810f-c04153c831b5
 2012-09-04 09:58:57 +00:00
vegorov@google.com 264c4f6d1a Add support for XMM registers in SSA code generation pipeline. 
Split BinaryDoubleOp into several instructions that manipulate unboxed doubles.

R=fschneider@google.com
BUG=

Review URL: https://chromiumcodereview.appspot.com//10875030

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@11313 260f80e4-7a28-3924-810f-c04153c831b5
 2012-08-24 14:45:42 +00:00
iposva@google.com d4bd618e75 - Fix the x64 store-barrier. 
- Allow assembler test drivers to be shared across architectures.
- Add a shared StoreIntoObject assembler test.
Review URL: https://chromiumcodereview.appspot.com//10636017

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@9050 260f80e4-7a28-3924-810f-c04153c831b5
 2012-06-22 23:48:51 +00:00
iposva@google.com efb7f31053 - Fix the barrier code when low bits of Smi are zeroes. 
- Harden the assembler test for StoreIntoObject to test a variety of Smi values.
Review URL: https://chromiumcodereview.appspot.com//10592023

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@8939 260f80e4-7a28-3924-810f-c04153c831b5
 2012-06-20 20:37:22 +00:00
iposva@google.com dbd08016de - Inline the store buffer update into a stub instead of 
calling out into the C++ runtime.
Review URL: https://chromiumcodereview.appspot.com//10578046

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@8929 260f80e4-7a28-3924-810f-c04153c831b5
 2012-06-20 18:05:51 +00:00
srdjan@google.com 5023823e5b Fix trigonometric intrinsics: if allocation fails remember to release the loaded value on FPU stack. 
Review URL: https://chromiumcodereview.appspot.com//9909024

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@6003 260f80e4-7a28-3924-810f-c04153c831b5
 2012-03-29 21:01:48 +00:00
srdjan@google.com 5d53270821 Intrinisifed more core library methods: isNaN, isNegative, cos, sin. 
TODO: inline those methods in otpimized code.
Review URL: https://chromiumcodereview.appspot.com//9320023

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@3869 260f80e4-7a28-3924-810f-c04153c831b5
 2012-02-02 19:44:55 +00:00
turnidge@google.com c6aadb497d Teach the assembler how to generate multi-byte nops. Teach the 
disassembler to understand them.  Use multi-byte nops in Align().  Add
tests.
Review URL: http://codereview.chromium.org//8888020

git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@2290 260f80e4-7a28-3924-810f-c04153c831b5
 2011-12-08 23:35:34 +00:00
dgrove@google.com 4c0f559d23 Initial checkin. 
git-svn-id: https://dart.googlecode.com/svn/branches/bleeding_edge/dart@15 260f80e4-7a28-3924-810f-c04153c831b5
 2011-10-05 05:20:07 +00:00