Steve Karg
245 lines
6.5 KiB
C
245 lines
6.5 KiB
C
/**
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* \file
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*
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* \brief PWM service for XMEGA.
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*
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* Copyright (c) 2012 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#include <asf.h>
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/**
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* \brief Calculate TC settings from PWM frequency
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*
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* This function will find the correct TC settings (clock prescaler and
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* period) which will give the wanted PWM frequency.
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*
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* \note Since we want to be able to run the PWM at all duty-cycles ranging
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* from 0-100%, we require a period of at least 100 to achieve this. Thus, the
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* highest possible PWM frequency is CPU frequency / 100.
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*
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* \param config Pointer to PWM configuration.
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* \param freq_hz Wanted PWM frequency in Hz.
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*/
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void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz)
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{
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uint32_t cpu_hz = sysclk_get_cpu_hz();
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uint16_t smallest_div;
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uint16_t dividor;
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/* Avoid division by zero. */
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Assert(freq_hz != 0);
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/* Calculate the smallest divider for the requested frequency
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related to the CPU frequency */
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smallest_div = cpu_hz / freq_hz / 0xFFFF;
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if (smallest_div < 1) {
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dividor = 1;
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config->clk_sel = PWM_CLK_DIV1;
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} else if (smallest_div < 2) {
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dividor = 2;
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config->clk_sel = PWM_CLK_DIV2;
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} else if (smallest_div < 4) {
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dividor = 4;
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config->clk_sel = PWM_CLK_DIV4;
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} else if (smallest_div < 8) {
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dividor = 8;
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config->clk_sel = PWM_CLK_DIV8;
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} else if (smallest_div < 64) {
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dividor = 64;
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config->clk_sel = PWM_CLK_DIV64;
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} else if (smallest_div < 256) {
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dividor = 256;
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config->clk_sel = PWM_CLK_DIV256;
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} else {
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dividor = 1024;
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config->clk_sel = PWM_CLK_DIV1024;
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}
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/* Calculate the period from the just found divider */
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config->period = cpu_hz / dividor / freq_hz;
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/* Make sure our period is at least 100 ticks so we are able to provide
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a full range (0-100% duty cycle */
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if (config->period < 100) {
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/* The period is too short. */
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config->clk_sel = PWM_CLK_OFF;
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config->period = 0;
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Assert(false);
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}
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}
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/**
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* \brief Initialize PWM configuration struct and set correct I/O pin to output
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*
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* \param config Pointer to PWM configuration struct.
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* \param tc \ref pwm_tc_t "TC" to use for this PWM.
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* \param channel \ref pwm_channel_t "CC channel" to use for this PWM.
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* \param freq_hz Frequency to use for this PWM.
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*/
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void pwm_init(struct pwm_config *config, enum pwm_tc_t tc,
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enum pwm_channel_t channel, uint16_t freq_hz)
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{
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/* Number of channels for this TC */
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uint8_t num_chan = 0;
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UNUSED(num_chan);
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/* Set TC and correct I/O pin to output */
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switch (tc) {
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#if defined(TCC0)
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case PWM_TCC0:
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config->tc = &TCC0;
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PORTC.DIR |= (1 << (channel-1));
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num_chan = 4;
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break;
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#endif
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#if defined(TCC1)
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case PWM_TCC1:
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config->tc = &TCC1;
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PORTC.DIR |= (1 << (channel+3));
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num_chan = 2;
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break;
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#endif
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#if defined(TCD0)
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case PWM_TCD0:
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config->tc = &TCD0;
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PORTD.DIR |= (1 << (channel-1));
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num_chan = 4;
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break;
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#endif
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#if defined(TCD1)
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case PWM_TCD1:
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config->tc = &TCD1;
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PORTD.DIR |= (1 << (channel+3));
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num_chan = 2;
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break;
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#endif
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#if defined(TCE0)
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case PWM_TCE0:
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config->tc = &TCE0;
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PORTE.DIR |= (1 << (channel-1));
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num_chan = 4;
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break;
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#endif
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#if defined(TCE1)
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case PWM_TCE1:
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config->tc = &TCE1;
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PORTE.DIR |= (1 << (channel+3));
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num_chan = 2;
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break;
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#endif
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#if defined(TCF0)
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case PWM_TCF0:
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config->tc = &TCF0;
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PORTF.DIR |= (1 << (channel-1));
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num_chan = 4;
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break;
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#endif
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#if defined(TCF1)
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case PWM_TCF1:
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config->tc = &TCF1;
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PORTF.DIR |= (1 << (channel+3));
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num_chan = 2;
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break;
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#endif
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default:
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Assert(false);
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break;
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}
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/* Make sure we are not given a channel number larger
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than this TC can handle */
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Assert(channel <= num_chan);
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config->channel = channel;
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/* Set the correct cc_mask */
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switch (channel) {
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case PWM_CH_A:
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config->cc_mask = TC_CCAEN;
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break;
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case PWM_CH_B:
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config->cc_mask = TC_CCBEN;
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break;
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case PWM_CH_C:
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config->cc_mask = TC_CCCEN;
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break;
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case PWM_CH_D:
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config->cc_mask = TC_CCDEN;
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break;
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default:
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Assert(false);
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break;
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}
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/* Enable peripheral clock for this TC */
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tc_enable(config->tc);
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/* Set this TC's waveform generator in single slope mode */
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tc_set_wgm(config->tc, TC_WG_SS);
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/* Default values (disable TC and set minimum period)*/
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config->period = 0;
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config->clk_sel = PWM_CLK_OFF;
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tc_write_clock_source(config->tc, PWM_CLK_OFF);
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/* Set the PWM frequency */
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pwm_set_frequency(config, freq_hz);
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}
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/**
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* \brief Start a PWM channel
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*
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* This function enables a channel with a given duty cycle.
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*
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* \param *config Pointer to the PWM configuration struct
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* \param duty_cycle_scale Duty cycle as a value between 0 and 100.
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*/
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void pwm_start(struct pwm_config *config, uint8_t duty_cycle_scale)
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{
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/* Set given duty cycle */
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pwm_set_duty_cycle_percent(config, duty_cycle_scale);
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/* Set correct TC period */
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tc_write_period(config->tc, config->period);
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/* Enable CC channel for this TC */
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tc_enable_cc_channels(config->tc, config->cc_mask);
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/* Enable TC by setting correct clock prescaler */
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tc_write_clock_source(config->tc, config->clk_sel);
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}
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