Steve Karg
cb4f675e39
* Reduced MS/TP MAX_APDU to 480 from 1476 so that devices not use new MS/TP extended frame types which older routers do not understand. * Added extra objects to STM32F4xx example to elicit edge cases in object-list for testing.
91 lines
1.9 KiB
Plaintext
91 lines
1.9 KiB
Plaintext
MEMORY
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{
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sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 128k
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flash (RX) : ORIGIN = 0x08000000, LENGTH = 512k
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}
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_estack = 0x20000000 + 128k - 4; /* End of SRAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 48K;
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/* Analysis from MAP file and Stack Usage (su) +
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adjust _Min_Heap_Size until linker error: sram overflowed by x bytes
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_Min_Heap_Size = _Min_Heap_Size - x
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*/
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_Min_Stack_Size = 16K;
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_text = .;
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PROVIDE(stext = .);
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KEEP(*(.isr_vector))
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KEEP(*(.init))
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*(.text .text.*)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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. = ALIGN(4);
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_etext = .;
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_sidata = _etext;
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PROVIDE(etext = .);
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_fini = . ;
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*(.fini)
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} >flash
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.data : AT (_etext)
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{
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. = ALIGN(4);
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_sdata = .;
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*(.ramfunc .ramfunc.* .fastrun .fastrun.*)
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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. = ALIGN(4);
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_edata = .;
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} >sram
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.ARM.extab :
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{
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*(.ARM.extab*)
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} >sram
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx*)
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} >sram
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__exidx_end = .;
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.bss (NOLOAD) : {
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .;
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >sram
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PROVIDE ( end = _ebss );
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PROVIDE ( _end = _ebss );
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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. = . + _Min_Heap_Size;
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_user_heap_end = .;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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} >sram
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PROVIDE(_heap_limit = _user_heap_end);
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PROVIDE(_stack_limit = _estack);
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}
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