skarg
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
/**************************************************************************
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*
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* Copyright (C) 2009 Steve Karg <skarg@users.sourceforge.net>
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*********************************************************************/
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#include <stdbool.h>
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#include <stdint.h>
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#include "hardware.h"
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/* prescale select bits */
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#if (F_CPU >> 1) < 1000000
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#define ADPS_8BIT (1)
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#define ADPS_10BIT (3)
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#elif (F_CPU >> 2) < 1000000
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#define ADPS_8BIT (2)
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#define ADPS_10BIT (4)
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#elif (F_CPU >> 3) < 1000000
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#define ADPS_8BIT (3)
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#define ADPS_10BIT (5)
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#elif (F_CPU >> 4) < 1000000
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#define ADPS_8BIT (4)
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#define ADPS_10BIT (6)
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#elif (F_CPU >> 5) < 1000000
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#define ADPS_8BIT (5)
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#define ADPS_10BIT (7)
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#else
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#error "ADC: F_CPU too large for accuracy."
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#endif
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/* we could have array of ADC results */
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static volatile uint8_t Sample_Result;
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ISR(ADC_vect)
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{
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/* since we configured as ADLAR=1, get value from ADCH */
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Sample_Result = ADCH;
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}
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uint8_t adc_result(
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uint8_t channel)
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{ /* 0..7 = ADC0..ADC7, respectively */
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return Sample_Result;
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}
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void adc_init(
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void)
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{
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/* set prescaler */
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ADCSRA |= ADPS_8BIT;
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/* Initial channel selection */
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/* ADLAR = Left Adjust Result
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REFSx = hardware setup: cap on AREF
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*/
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ADMUX = 7 /* channel */ | (1 << ADLAR) | (0 << REFS1) | (1 << REFS0);
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/* ADEN = Enable
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ADSC = Start conversion
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ADIF = Interrupt Flag
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ADIE = Interrupt Enable
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ADATE = Auto Trigger Enable
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*/
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ADCSRA |= (1 << ADEN) | (1 << ADIE) | (1 << ADIF) | (1 << ADATE);
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/* trigger selection bits
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0 0 0 Free Running mode
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0 0 1 Analog Comparator
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0 1 0 External Interrupt Request 0
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0 1 1 Timer/Counter0 Compare Match
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1 0 0 Timer/Counter0 Overflow
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1 0 1 Timer/Counter1 Compare Match B
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1 1 0 Timer/Counter1 Overflow
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1 1 1 Timer/Counter1 Capture Event
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*/
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ADCSRB |= (0 << ADTS2) | (0 << ADTS1) | (0 << ADTS0);
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/* start the conversions */
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ADCSRA |= (1 << ADSC);
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/* Clear the Power Reduction bit */
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BIT_CLEAR(PRR, PRADC);
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}
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