Kari Argillander
cb243c36a8
* Change MIT license texts to SPDX-License-Identifier SPDX-License-Identifier is much easier to understand and grep than license text so use that instead. * Change GPL exception license texts to SPDX-License-Identifier SPDX-License-Identifier is much easier to understand and grep than license text so use that instead. * Change misc license texts to SPDX-License-Identifier There are some external code in repo which are not licenses as most of the stuff in this repo. We still want every file to have SPDX identifier to easily grep licenses. * Add currently used license files Even though Bacnet-Stack is using SPDX identifiers we still need to give those license files with source. For this reason add all license files to license/ folder. SPDX has also files which would make same thing but this is style which example Linux kernel is using and it is quite clear so I choose that one for now. I choosed not yet bring CC-PDDC as that is not right license for those files. --------- Co-authored-by: Kari Argillander <kari.argillander@fidelix.com>
84 lines
2.7 KiB
C
84 lines
2.7 KiB
C
/**************************************************************************
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*
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* Copyright (C) 2007 Steve Karg <skarg@users.sourceforge.net>
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*
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* SPDX-License-Identifier: MIT
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*
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*********************************************************************/
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#ifndef HARDWARE_H
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#define HARDWARE_H
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#include <p18f6720.h>
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#include <stdint.h>
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#include <stdbool.h>
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#define RS485_TX_ENABLE PORTEbits.RE3
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#define RS485_RX_DISABLE PORTGbits.RG0
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#define TURN_OFF_COMPARATORS() CMCON = 0x07
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enum INT_STATE { INT_DISABLED, INT_ENABLED, INT_RESTORE };
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#define RESTART_WDT() { _asm CLRWDT _endasm }
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/* *************************************************************************
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define ENABLE_GLOBAL_INT() INTCONbits.GIE = 1 �
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#define DISABLE_GLOBAL_INT() INTCONbits.GIE = 0 �
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#define ENABLE_PERIPHERAL_INT() INTCONbits.PEIE = 1 �
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#define DISABLE_PERIPHERAL_INT() INTCONbits.PEIE = 0
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*************************************************************************** */
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#define ENABLE_HIGH_INT() INTCONbits.GIE = 1
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#define DISABLE_HIGH_INT() INTCONbits.GIE = 0
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#define ENABLE_LOW_INT() INTCONbits.PEIE = 1
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#define DISABLE_LOW_INT() INTCONbits.PEIE = 0
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#define ENABLE_TIMER0_INT() INTCONbits.TMR0IE = 1
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#define DISABLE_TIMER0_INT() INTCONbits.TMR0IE = 0
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#define ENABLE_TIMER2_INT() PIE1bits.TMR2IE = 1
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#define DISABLE_TIMER2_INT() PIE1bits.TMR2IE = 0
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#define ENABLE_TIMER4_INT() PIE3bits.TMR4IE = 1
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#define DISABLE_TIMER4_INT() PIE3bits.TMR4IE = 0
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#define ENABLE_CCP2_INT() PIE2bits.CCP2IE = 1
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#define DISABLE_CCP2_INT() PIE2bits.CCP2IE = 0
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#define ENABLE_CCP1_INT() PIE1bits.CCP1IE = 1
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#define DISABLE_CCP1_INT() PIE1bits.CCP1IE = 0
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#define ENABLE_ABUS_INT() PIE1bits.SSPIE = 1
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#define DISABLE_ABUS_INT() PIE1bits.SSPIE = 0
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#define CLEAR_ABUS_FLAG() PIR1bits.SSPIF = 0
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#define SETUP_CCP1(x) CCP1CON = x
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#define SETUP_CCP2(x) CCP2CON = x
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#define DISABLE_RX_INT() PIE1bits.RCIE = 0
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#define ENABLE_RX_INT() PIE1bits.RCIE = 1
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#define DISABLE_TX_INT() PIE1bits.TXIE = 0
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#define ENABLE_TX_INT() PIE1bits.TXIE = 1
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#if CLOCKSPEED == 20
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#define DELAY_US(x) { _asm \
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MOVLW x \
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LOOP: \
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NOP \
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NOP \
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DECFSZ WREG, 1, 0 \
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BRA LOOP \
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_endasm }
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#endif
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#define setup_timer4(mode, period, postscale) \
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T4CON = (mode | (postscale - 1) << 3); \
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PR4 = period
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#define setup_timer2(mode, period, postscale) \
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T2CON = (mode | (postscale - 1) << 3); \
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PR2 = period
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#endif /* HARDWARE_H */
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