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Feature/make pretty apps and ports (#80)

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* Added pretty-apps and pretty-ports make targets

* pretty-fied apps folder C files

* Pretty-fied ports folder C and H files

Co-authored-by: Steve Karg <skarg@users.sourceforge.net>
This commit is contained in:
Steve Karg
2020-04-30 10:13:11 -05:00
committed by GitHub
parent 0abcbea971
commit fdd49f1791
152 changed files with 9668 additions and 11674 deletions
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ports/stm32f10x/CMSIS/core_cm3.c
+187 -228
View File
@@ -1,51 +1,54 @@
/**************************************************************************//**
* @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V1.30
* @date 30. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/**************************************************************************/ /**
* @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V1.30
* @date 30. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#if defined(__CC_ARM)
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined(__ICCARM__)
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE \
inline /*!< inline keyword for IAR Compiler. Only avaiable in High \
optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined(__GNUC__)
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#elif defined(__TASKING__)
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/* ################### Compiler specific Intrinsics
* ########################### */
/* ################### Compiler specific Intrinsics ########################### */
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
#if defined(__CC_ARM) /*------------------RealView Compiler \
-----------------*/
/* ARM armcc specific functions */
/**
@@ -55,25 +58,17 @@
*
* Return the actual process stack pointer
*/
__ASM uint32_t __get_PSP(void)
{
mrs r0, psp
bx lr
}
__ASM uint32_t __get_PSP(void) { mrs r0, psp bx lr }
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
__ASM void __set_PSP(uint32_t topOfProcStack)
{
msr psp, r0
bx lr
}
__ASM void __set_PSP(uint32_t topOfProcStack) { msr psp, r0 bx lr }
/**
* @brief Return the Main Stack Pointer
@@ -83,25 +78,17 @@ __ASM void __set_PSP(uint32_t topOfProcStack)
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
__ASM uint32_t __get_MSP(void)
{
mrs r0, msp
bx lr
}
__ASM uint32_t __get_MSP(void) { mrs r0, msp bx lr }
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
__ASM void __set_MSP(uint32_t mainStackPointer)
{
msr msp, r0
bx lr
}
__ASM void __set_MSP(uint32_t mainStackPointer) { msr msp, r0 bx lr }
/**
* @brief Reverse byte order in unsigned short value
@@ -111,14 +98,11 @@ __ASM void __set_MSP(uint32_t mainStackPointer)
*
* Reverse byte order in unsigned short value
*/
__ASM uint32_t __REV16(uint16_t value)
{
rev16 r0, r0
bx lr
}
__ASM uint32_t __REV16(uint16_t value) { rev16 r0, r0 bx lr }
/**
* @brief Reverse byte order in signed short value with sign extension to integer
* @brief Reverse byte order in signed short value with sign extension to
* integer
*
* @param value value to reverse
* @return reversed value
@@ -127,11 +111,9 @@ __ASM uint32_t __REV16(uint16_t value)
*/
__ASM int32_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
revsh r0, r0 bx lr
}
#if (__ARMCC_VERSION < 400000)
/**
@@ -139,10 +121,7 @@ __ASM int32_t __REVSH(int16_t value)
*
* Removes the exclusive lock which is created by ldrex.
*/
__ASM void __CLREX(void)
{
clrex
}
__ASM void __CLREX(void) { clrex }
/**
* @brief Return the Base Priority value
@@ -151,11 +130,7 @@ __ASM void __CLREX(void)
*
* Return the content of the base priority register
*/
__ASM uint32_t __get_BASEPRI(void)
{
mrs r0, basepri
bx lr
}
__ASM uint32_t __get_BASEPRI(void) { mrs r0, basepri bx lr }
/**
* @brief Set the Base Priority value
@@ -164,11 +139,7 @@ __ASM uint32_t __get_BASEPRI(void)
*
* Set the base priority register
*/
__ASM void __set_BASEPRI(uint32_t basePri)
{
msr basepri, r0
bx lr
}
__ASM void __set_BASEPRI(uint32_t basePri) { msr basepri, r0 bx lr }
/**
* @brief Return the Priority Mask value
@@ -177,11 +148,7 @@ __ASM void __set_BASEPRI(uint32_t basePri)
*
* Return state of the priority mask bit from the priority mask register
*/
__ASM uint32_t __get_PRIMASK(void)
{
mrs r0, primask
bx lr
}
__ASM uint32_t __get_PRIMASK(void) { mrs r0, primask bx lr }
/**
* @brief Set the Priority Mask value
@@ -190,11 +157,7 @@ __ASM uint32_t __get_PRIMASK(void)
*
* Set the priority mask bit in the priority mask register
*/
__ASM void __set_PRIMASK(uint32_t priMask)
{
msr primask, r0
bx lr
}
__ASM void __set_PRIMASK(uint32_t priMask) { msr primask, r0 bx lr }
/**
* @brief Return the Fault Mask value
@@ -203,11 +166,7 @@ __ASM void __set_PRIMASK(uint32_t priMask)
*
* Return the content of the fault mask register
*/
__ASM uint32_t __get_FAULTMASK(void)
{
mrs r0, faultmask
bx lr
}
__ASM uint32_t __get_FAULTMASK(void) { mrs r0, faultmask bx lr }
/**
* @brief Set the Fault Mask value
@@ -216,24 +175,16 @@ __ASM uint32_t __get_FAULTMASK(void)
*
* Set the fault mask register
*/
__ASM void __set_FAULTMASK(uint32_t faultMask)
{
msr faultmask, r0
bx lr
}
__ASM void __set_FAULTMASK(uint32_t faultMask) { msr faultmask, r0 bx lr }
/**
* @brief Return the Control Register value
*
*
* @return Control value
*
* Return the content of the control register
*/
__ASM uint32_t __get_CONTROL(void)
{
mrs r0, control
bx lr
}
__ASM uint32_t __get_CONTROL(void) { mrs r0, control bx lr }
/**
* @brief Set the Control Register value
@@ -244,17 +195,15 @@ __ASM uint32_t __get_CONTROL(void)
*/
__ASM void __set_CONTROL(uint32_t control)
{
msr control, r0
bx lr
msr control, r0 bx lr
}
#endif /* __ARMCC_VERSION */
#endif /* __ARMCC_VERSION */
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
#elif (defined( \
__ICCARM__)) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#pragma diag_suppress=Pe940
#pragma diag_suppress = Pe940
/**
* @brief Return the Process Stack Pointer
@@ -265,8 +214,8 @@ __ASM void __set_CONTROL(uint32_t control)
*/
uint32_t __get_PSP(void)
{
__ASM("mrs r0, psp");
__ASM("bx lr");
__ASM("mrs r0, psp");
__ASM("bx lr");
}
/**
@@ -274,13 +223,13 @@ uint32_t __get_PSP(void)
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack)
{
__ASM("msr psp, r0");
__ASM("bx lr");
__ASM("msr psp, r0");
__ASM("bx lr");
}
/**
@@ -293,8 +242,8 @@ void __set_PSP(uint32_t topOfProcStack)
*/
uint32_t __get_MSP(void)
{
__ASM("mrs r0, msp");
__ASM("bx lr");
__ASM("mrs r0, msp");
__ASM("bx lr");
}
/**
@@ -302,13 +251,13 @@ uint32_t __get_MSP(void)
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack)
{
__ASM("msr msp, r0");
__ASM("bx lr");
__ASM("msr msp, r0");
__ASM("bx lr");
}
/**
@@ -321,8 +270,8 @@ void __set_MSP(uint32_t topOfMainStack)
*/
uint32_t __REV16(uint16_t value)
{
__ASM("rev16 r0, r0");
__ASM("bx lr");
__ASM("rev16 r0, r0");
__ASM("bx lr");
}
/**
@@ -335,8 +284,8 @@ uint32_t __REV16(uint16_t value)
*/
uint32_t __RBIT(uint32_t value)
{
__ASM("rbit r0, r0");
__ASM("bx lr");
__ASM("rbit r0, r0");
__ASM("bx lr");
}
/**
@@ -349,8 +298,8 @@ uint32_t __RBIT(uint32_t value)
*/
uint8_t __LDREXB(uint8_t *addr)
{
__ASM("ldrexb r0, [r0]");
__ASM("bx lr");
__ASM("ldrexb r0, [r0]");
__ASM("bx lr");
}
/**
@@ -363,8 +312,8 @@ uint8_t __LDREXB(uint8_t *addr)
*/
uint16_t __LDREXH(uint16_t *addr)
{
__ASM("ldrexh r0, [r0]");
__ASM("bx lr");
__ASM("ldrexh r0, [r0]");
__ASM("bx lr");
}
/**
@@ -377,8 +326,8 @@ uint16_t __LDREXH(uint16_t *addr)
*/
uint32_t __LDREXW(uint32_t *addr)
{
__ASM("ldrex r0, [r0]");
__ASM("bx lr");
__ASM("ldrex r0, [r0]");
__ASM("bx lr");
}
/**
@@ -392,8 +341,8 @@ uint32_t __LDREXW(uint32_t *addr)
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
__ASM("strexb r0, r0, [r1]");
__ASM("bx lr");
__ASM("strexb r0, r0, [r1]");
__ASM("bx lr");
}
/**
@@ -407,8 +356,8 @@ uint32_t __STREXB(uint8_t value, uint8_t *addr)
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
__ASM("strexh r0, r0, [r1]");
__ASM("bx lr");
__ASM("strexh r0, r0, [r1]");
__ASM("bx lr");
}
/**
@@ -422,14 +371,14 @@ uint32_t __STREXH(uint16_t value, uint16_t *addr)
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
__ASM("strex r0, r0, [r1]");
__ASM("bx lr");
__ASM("strex r0, r0, [r1]");
__ASM("bx lr");
}
#pragma diag_default=Pe940
#pragma diag_default = Pe940
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
#elif (defined( \
__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/**
@@ -439,15 +388,16 @@ uint32_t __STREXW(uint32_t value, uint32_t *addr)
*
* Return the actual process stack pointer
*/
uint32_t __get_PSP(void) __attribute__( ( naked ) );
uint32_t __get_PSP(void) __attribute__((naked));
uint32_t __get_PSP(void)
{
uint32_t result=0;
uint32_t result = 0;
__ASM volatile ("MRS %0, psp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
__ASM volatile("MRS %0, psp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t"
: "=r"(result));
return (result);
}
/**
@@ -455,14 +405,16 @@ uint32_t __get_PSP(void)
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
void __set_PSP(uint32_t topOfProcStack) __attribute__((naked));
void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0\n\t"
"BX lr \n\t" : : "r" (topOfProcStack) );
__ASM volatile("MSR psp, %0\n\t"
"BX lr \n\t"
:
: "r"(topOfProcStack));
}
/**
@@ -473,15 +425,16 @@ void __set_PSP(uint32_t topOfProcStack)
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
uint32_t __get_MSP(void) __attribute__( ( naked ) );
uint32_t __get_MSP(void) __attribute__((naked));
uint32_t __get_MSP(void)
{
uint32_t result=0;
uint32_t result = 0;
__ASM volatile ("MRS %0, msp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
__ASM volatile("MRS %0, msp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t"
: "=r"(result));
return (result);
}
/**
@@ -489,14 +442,16 @@ uint32_t __get_MSP(void)
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
void __set_MSP(uint32_t topOfMainStack) __attribute__((naked));
void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0\n\t"
"BX lr \n\t" : : "r" (topOfMainStack) );
__ASM volatile("MSR msp, %0\n\t"
"BX lr \n\t"
:
: "r"(topOfMainStack));
}
/**
@@ -508,10 +463,10 @@ void __set_MSP(uint32_t topOfMainStack)
*/
uint32_t __get_BASEPRI(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
return(result);
uint32_t result = 0;
__ASM volatile("MRS %0, basepri_max" : "=r"(result));
return (result);
}
/**
@@ -523,7 +478,7 @@ uint32_t __get_BASEPRI(void)
*/
void __set_BASEPRI(uint32_t value)
{
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
__ASM volatile("MSR basepri, %0" : : "r"(value));
}
/**
@@ -535,10 +490,10 @@ void __set_BASEPRI(uint32_t value)
*/
uint32_t __get_PRIMASK(void)
{
uint32_t result=0;
uint32_t result = 0;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
__ASM volatile("MRS %0, primask" : "=r"(result));
return (result);
}
/**
@@ -550,7 +505,7 @@ uint32_t __get_PRIMASK(void)
*/
void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
__ASM volatile("MSR primask, %0" : : "r"(priMask));
}
/**
@@ -562,10 +517,10 @@ void __set_PRIMASK(uint32_t priMask)
*/
uint32_t __get_FAULTMASK(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
uint32_t result = 0;
__ASM volatile("MRS %0, faultmask" : "=r"(result));
return (result);
}
/**
@@ -577,22 +532,22 @@ uint32_t __get_FAULTMASK(void)
*/
void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
__ASM volatile("MSR faultmask, %0" : : "r"(faultMask));
}
/**
* @brief Return the Control Register value
*
* @return Control value
*
* @return Control value
*
* Return the content of the control register
*/
uint32_t __get_CONTROL(void)
{
uint32_t result=0;
uint32_t result = 0;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
__ASM volatile("MRS %0, control" : "=r"(result));
return (result);
}
/**
@@ -604,10 +559,9 @@ uint32_t __get_CONTROL(void)
*/
void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) );
__ASM volatile("MSR control, %0" : : "r"(control));
}
/**
* @brief Reverse byte order in integer value
*
@@ -618,10 +572,10 @@ void __set_CONTROL(uint32_t control)
*/
uint32_t __REV(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("rev %0, %1" : "=r"(result) : "r"(value));
return (result);
}
/**
@@ -634,14 +588,15 @@ uint32_t __REV(uint32_t value)
*/
uint32_t __REV16(uint16_t value)
{
uint32_t result=0;
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("rev16 %0, %1" : "=r"(result) : "r"(value));
return (result);
}
/**
* @brief Reverse byte order in signed short value with sign extension to integer
* @brief Reverse byte order in signed short value with sign extension to
* integer
*
* @param value value to reverse
* @return reversed value
@@ -650,10 +605,10 @@ uint32_t __REV16(uint16_t value)
*/
int32_t __REVSH(int16_t value)
{
uint32_t result=0;
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("revsh %0, %1" : "=r"(result) : "r"(value));
return (result);
}
/**
@@ -666,10 +621,10 @@ int32_t __REVSH(int16_t value)
*/
uint32_t __RBIT(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("rbit %0, %1" : "=r"(result) : "r"(value));
return (result);
}
/**
@@ -682,10 +637,10 @@ uint32_t __RBIT(uint32_t value)
*/
uint8_t __LDREXB(uint8_t *addr)
{
uint8_t result=0;
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
uint8_t result = 0;
__ASM volatile("ldrexb %0, [%1]" : "=r"(result) : "r"(addr));
return (result);
}
/**
@@ -698,10 +653,10 @@ uint8_t __LDREXB(uint8_t *addr)
*/
uint16_t __LDREXH(uint16_t *addr)
{
uint16_t result=0;
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
uint16_t result = 0;
__ASM volatile("ldrexh %0, [%1]" : "=r"(result) : "r"(addr));
return (result);
}
/**
@@ -714,10 +669,10 @@ uint16_t __LDREXH(uint16_t *addr)
*/
uint32_t __LDREXW(uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
uint32_t result = 0;
__ASM volatile("ldrex %0, [%1]" : "=r"(result) : "r"(addr));
return (result);
}
/**
@@ -731,10 +686,12 @@ uint32_t __LDREXW(uint32_t *addr)
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("strexb %0, %2, [%1]"
: "=r"(result)
: "r"(addr), "r"(value));
return (result);
}
/**
@@ -748,10 +705,12 @@ uint32_t __STREXB(uint8_t value, uint8_t *addr)
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("strexh %0, %2, [%1]"
: "=r"(result)
: "r"(addr), "r"(value));
return (result);
}
/**
@@ -765,14 +724,14 @@ uint32_t __STREXH(uint16_t value, uint16_t *addr)
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
uint32_t result = 0;
__ASM volatile("strex %0, %2, [%1]" : "=r"(result) : "r"(addr), "r"(value));
return (result);
}
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
#elif (defined(__TASKING__)) /*------------------ TASKING Compiler \
---------------------*/
/* TASKING carm specific functions */
/*