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Feature/make pretty apps and ports (#80)

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* Added pretty-apps and pretty-ports make targets

* pretty-fied apps folder C files

* Pretty-fied ports folder C and H files

Co-authored-by: Steve Karg <skarg@users.sourceforge.net>
This commit is contained in:
Steve Karg
2020-04-30 10:13:11 -05:00
committed by GitHub
parent 0abcbea971
commit fdd49f1791
152 changed files with 9668 additions and 11674 deletions
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ports/at91sam7s/init.c
+33 -27
View File
@@ -1,39 +1,42 @@
/* ---------------------------------------------------------------------------- */
/* ----------------------------------------------------------------------------
*/
/* ATMEL Microcontroller Software Support - ROUSSET - */
/* ---------------------------------------------------------------------------- */
/* ----------------------------------------------------------------------------
*/
/* The software is delivered "AS IS" without warranty or condition of any */
/* kind, either express, implied or statutory. This includes without */
/* limitation any warranty or condition with respect to merchantability or */
/* fitness for any particular purpose, or against the infringements of */
/* intellectual property rights of others. */
/* ---------------------------------------------------------------------------- */
/* ----------------------------------------------------------------------------
*/
/* File Name : Cstartup_SAM7.c */
/* Object : Low level initializations written in C for IAR tools */
/* Object : Low level initializations written in C for IAR tools
*/
/* 1.0 08/Sep/04 JPP : Creation */
/* 1.10 10/Sep/04 JPP : Update AT91C_CKGR_PLLCOUNT filed */
/* ---------------------------------------------------------------------------- */
/* ----------------------------------------------------------------------------
*/
/* Include the board file description */
#include "board.h"
/* The following functions must be write in ARM mode this function called directly */
/* The following functions must be write in ARM mode this function called
* directly */
/* by exception vector */
extern void AT91F_Spurious_handler(
void);
extern void AT91F_Default_IRQ_handler(
void);
extern void AT91F_Default_FIQ_handler(
void);
extern void AT91F_Spurious_handler(void);
extern void AT91F_Default_IRQ_handler(void);
extern void AT91F_Default_FIQ_handler(void);
/**---------------------------------------------------------------------------- */
/**----------------------------------------------------------------------------
*/
/** \fn AT91F_LowLevelInit */
/** \brief This function performs very low level HW initialization */
/** this function can be use a Stack, depending the compilation */
/** optimization mode */
/**---------------------------------------------------------------------------- */
void LowLevelInit(
void)
/**----------------------------------------------------------------------------
*/
void LowLevelInit(void)
{
int i;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
@@ -57,7 +60,8 @@ void LowLevelInit(
pPMC->PMC_MOR = ((AT91C_CKGR_OSCOUNT & (0x06 << 8)) | AT91C_CKGR_MOSCEN);
/* Wait the startup time */
while (!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
while (!(pPMC->PMC_SR & AT91C_PMC_MOSCS))
;
/* PMC Clock Generator PLL Register setup */
/* */
@@ -65,9 +69,11 @@ void LowLevelInit(
/* MUL = 72 */
/* PLLCOUNT = 10 */
/* */
/* Main Clock (MAINCK from crystal oscillator) = 18432000 hz (see AT91SAM7-EK schematic) */
/* Main Clock (MAINCK from crystal oscillator) = 18432000 hz (see
* AT91SAM7-EK schematic) */
/* MAINCK / DIV = 18432000/14 = 1316571 hz */
/* PLLCK = 1316571 * (MUL + 1) = 1316571 * (72 + 1) = 1316571 * 73 = 96109683 hz */
/* PLLCK = 1316571 * (MUL + 1) = 1316571 * (72 + 1) = 1316571 * 73 =
* 96109683 hz */
/* */
/* PLLCOUNT = number of slow clock cycles before the LOCK bit is set */
/* in PMC_SR after CKGR_PLLR is written. */
@@ -76,12 +82,12 @@ void LowLevelInit(
/* */
/* OUT = 0 (not used) */
/* result: AT91C_CKGR_PLLR = 0x00000000480A0E (PLL Register) */
pPMC->PMC_PLLR =
((AT91C_CKGR_DIV & 14) | (AT91C_CKGR_PLLCOUNT & (10 << 8)) |
(AT91C_CKGR_MUL & (72 << 16)));
pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 14) |
(AT91C_CKGR_PLLCOUNT & (10 << 8)) | (AT91C_CKGR_MUL & (72 << 16)));
/* Wait the startup time (until PMC Status register LOCK bit is set) */
while (!(pPMC->PMC_SR & AT91C_PMC_LOCK));
while (!(pPMC->PMC_SR & AT91C_PMC_LOCK))
;
/* PMC Master Clock (MCK) Register setup */
/* */
@@ -94,9 +100,9 @@ void LowLevelInit(
pPMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
/* Set up the default interrupts handler vectors */
AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler;
AT91C_BASE_AIC->AIC_SVR[0] = (int)AT91F_Default_FIQ_handler;
for (i = 1; i < 31; i++) {
AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler;
AT91C_BASE_AIC->AIC_SVR[i] = (int)AT91F_Default_IRQ_handler;
}
AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler;
AT91C_BASE_AIC->AIC_SPU = (int)AT91F_Spurious_handler;
}