dali/bacnet_stack
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Ran indent script.

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This commit is contained in:
skarg
2009-07-29 18:06:33 +00:00
parent 551f2767e0
commit db61a1122f
37 changed files with 227 additions and 218 deletions
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bacnet-stack/ports/bdk-atxx4-mstp/adc.c
+31 -30
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@@ -27,22 +27,22 @@
/* prescale select bits */
#if (F_CPU >> 1) < 1000000
#define ADPS_8BIT (1)
#define ADPS_10BIT (3)
#define ADPS_8BIT (1)
#define ADPS_10BIT (3)
#elif (F_CPU >> 2) < 1000000
#define ADPS_8BIT (2)
#define ADPS_10BIT (4)
#define ADPS_8BIT (2)
#define ADPS_10BIT (4)
#elif (F_CPU >> 3) < 1000000
#define ADPS_8BIT (3)
#define ADPS_10BIT (5)
#define ADPS_8BIT (3)
#define ADPS_10BIT (5)
#elif (F_CPU >> 4) < 1000000
#define ADPS_8BIT (4)
#define ADPS_10BIT (6)
#define ADPS_8BIT (4)
#define ADPS_10BIT (6)
#elif (F_CPU >> 5) < 1000000
#define ADPS_8BIT (5)
#define ADPS_10BIT (7)
#define ADPS_8BIT (5)
#define ADPS_10BIT (7)
#else
#error "ADC: F_CPU too large for accuracy."
#error "ADC: F_CPU too large for accuracy."
#endif
/* we could have array of ADC results */
@@ -55,37 +55,38 @@ ISR(ADC_vect)
}
uint8_t adc_result(
uint8_t channel) /* 0..7 = ADC0..ADC7, respectively */
{
uint8_t channel)
{ /* 0..7 = ADC0..ADC7, respectively */
return Sample_Result;
}
void adc_init(void)
void adc_init(
void)
{
/* set prescaler */
ADCSRA |= ADPS_8BIT;
/* Initial channel selection */
/* ADLAR = Left Adjust Result
REFSx = hardware setup: cap on AREF
*/
ADMUX = 7 /* channel */ | (1 << ADLAR) | (0 << REFS1) | (1 << REFS0);
*/
ADMUX = 7 /* channel */ | (1 << ADLAR) | (0 << REFS1) | (1 << REFS0);
/* ADEN = Enable
ADSC = Start conversion
ADIF = Interrupt Flag
ADIE = Interrupt Enable
ADATE = Auto Trigger Enable
*/
ADSC = Start conversion
ADIF = Interrupt Flag
ADIE = Interrupt Enable
ADATE = Auto Trigger Enable
*/
ADCSRA |= (1 << ADEN) | (1 << ADIE) | (1 << ADIF) | (1 << ADATE);
/* trigger selection bits
0 0 0 Free Running mode
0 0 1 Analog Comparator
0 1 0 External Interrupt Request 0
0 1 1 Timer/Counter0 Compare Match
1 0 0 Timer/Counter0 Overflow
1 0 1 Timer/Counter1 Compare Match B
1 1 0 Timer/Counter1 Overflow
1 1 1 Timer/Counter1 Capture Event
*/
0 0 0 Free Running mode
0 0 1 Analog Comparator
0 1 0 External Interrupt Request 0
0 1 1 Timer/Counter0 Compare Match
1 0 0 Timer/Counter0 Overflow
1 0 1 Timer/Counter1 Compare Match B
1 1 0 Timer/Counter1 Overflow
1 1 1 Timer/Counter1 Capture Event
*/
ADCSRB |= (0 << ADTS2) | (0 << ADTS1) | (0 << ADTS0);
/* start the conversions */
ADCSRA |= (1 << ADSC);