Issue 2 move folders and use deep path include file names to prevent collisions (#4)

* moving folders and files and adjust server demo build

* Fix Makefile for apps/server on Linux

* fix unit test source file folders

* fix datetime convert UTC functions. Add Code::Blocks project for datetime testing

* added some ignore extensions

* disable parallel make option

* fix build for abort, dcc, and epics apps

* fix build for dcc, epics, error, and getevent apps.

* Fixed building of all apps

* fix the ipv4 to ipv6 router app build

* Change indent style from Google to Webkit

* make pretty to re-format style

* removed common Makefile since we already had one and two was too many

* remove scripts from root folder that are no longer maintained or used

* remove mercurial EOL and ignore files for git repo

* remove .vscodeconfig files from repo

* tweak clang-format style

* clang-format src and apps with tweaked style

* added clang-tidy to fix readability if braces in src

* result of make tidy for src and apps

* fix clang-tidy mangling

* Added code::blocks project for BACnet server simulation

* added code::blocks linux project for WhoIs app

* update text files for EOL

* fix EOL in some files

* fixed make win32 apps for older gcc

* Removed Borland C++ Makefile in apps. Unable to maintain support for Borland C++ compiler.

* created codeblocks project for apps/epics for Windows

* fixing ports/xplained to work with new data structure.

* fix ports/xplained example for Atmel Studio compile

* fix ports/stm32f10x example for gcc Makefile compile

* fix ports/stm32f10x example for IAR EWARM compile

* fix ports/xplained timer callback

* fix ports/bdk_atxx_mspt build with subdirs

* fix ports/bdk_atxx_mspt build with subdirs

* updated git ignore for IAR build artifacts

* updated gitignore for non-tracked files and folders

* fixed bdk-atxx4-mstp port for Rowley Crossworks project file

* fixed bdk-atxx4-mstp port for GCC AVR Makefile

* fixed atmega168 port for IAR AVR and GCC AVR Makefile

* fixed at91sam7s port for IAR ARM and GCC ARM Makefile

* removed unmaintainable DOS, RTOS32, and atmega8 ports.  Updated rx62n (untested).

* changed arm7 to uip port
This commit is contained in:
Steve Karg
2019-12-13 15:19:10 -06:00
committed by GitHub
parent 8a38dbe2cf
commit d50c190957
912 changed files with 36206 additions and 52502 deletions
+16 -16
View File
@@ -1,16 +1,16 @@
# gdb setup for J-Link - start JLinkGDBServer first
target remote localhost:2331
monitor reset
monitor speed 5
monitor speed auto
monitor long 0xffffff60 0x00320100
monitor long 0xfffffd44 0xa0008000
monitor long 0xfffffc20 0xa0000601
monitor sleep 100
monitor long 0xfffffc2c 0x00480a0e
monitor sleep 200
monitor long 0xfffffc30 0x7
monitor sleep 100
monitor long 0xfffffd08 0xa5000401
monitor sleep 100
# gdb setup for J-Link - start JLinkGDBServer first
target remote localhost:2331
monitor reset
monitor speed 5
monitor speed auto
monitor long 0xffffff60 0x00320100
monitor long 0xfffffd44 0xa0008000
monitor long 0xfffffc20 0xa0000601
monitor sleep 100
monitor long 0xfffffc2c 0x00480a0e
monitor sleep 200
monitor long 0xfffffc30 0x7
monitor sleep 100
monitor long 0xfffffd08 0xa5000401
monitor sleep 100
+17 -19
View File
@@ -25,10 +25,8 @@ BACNET_FLAGS += -DCRC_USE_TABLE
#BACNET_FLAGS += -DDLMSTP_TEST
BACNET_CORE = ../../src
BACNET_DEMO = ../../demo
BACNET_INCLUDE = ../../include
BACNET_OBJECT = ../../demo/object
BACNET_HANDLER = ../../demo/handler
BACNET_BASIC = $(BACNET_CORE)/basic
BACNET_INCLUDE = $(BACNET_CORE)
INCLUDES = -I.
INCLUDES += -I$(BACNET_INCLUDE)
INCLUDES += -I$(BACNET_OBJECT)
@@ -66,21 +64,22 @@ DEMOSRC = ai.c \
bi.c \
bv.c \
device.c \
$(BACNET_DEMO)/handler/txbuf.c \
$(BACNET_DEMO)/handler/noserv.c \
$(BACNET_DEMO)/handler/h_npdu.c \
$(BACNET_DEMO)/handler/h_whohas.c \
$(BACNET_DEMO)/handler/h_whois.c \
$(BACNET_DEMO)/handler/h_rd.c \
$(BACNET_DEMO)/handler/h_rp.c \
$(BACNET_DEMO)/handler/h_rpm.c \
$(BACNET_DEMO)/handler/h_wp.c \
$(BACNET_DEMO)/handler/h_dcc.c \
$(BACNET_DEMO)/handler/s_iam.c \
$(BACNET_DEMO)/handler/s_ihave.c
$(BACNET_BASIC)/tsm/tsm.c \
$(BACNET_BASIC)/sys/ringbuf.c \
$(BACNET_BASIC)/npdu/h_npdu.c \
$(BACNET_BASIC)/service/h_noserv.c \
$(BACNET_BASIC)/service/h_apdu.c \
$(BACNET_BASIC)/service/h_whohas.c \
$(BACNET_BASIC)/service/h_whois.c \
$(BACNET_BASIC)/service/h_rd.c \
$(BACNET_BASIC)/service/h_rp.c \
$(BACNET_BASIC)/service/h_rpm.c \
$(BACNET_BASIC)/service/h_wp.c \
$(BACNET_BASIC)/service/h_dcc.c \
$(BACNET_BASIC)/service/s_iam.c \
$(BACNET_BASIC)/service/s_ihave.c
CORESRC = $(BACNET_CORE)/abort.c \
$(BACNET_CORE)/apdu.c \
$(BACNET_CORE)/bacaddr.c \
$(BACNET_CORE)/bacapp.c \
$(BACNET_CORE)/bacdcode.c \
@@ -88,7 +87,7 @@ CORESRC = $(BACNET_CORE)/abort.c \
$(BACNET_CORE)/bacint.c \
$(BACNET_CORE)/bacreal.c \
$(BACNET_CORE)/bacstr.c \
$(BACNET_CORE)/crc.c \
$(BACNET_CORE)/datalink/crc.c \
$(BACNET_CORE)/datetime.c \
$(BACNET_CORE)/dcc.c \
$(BACNET_CORE)/iam.c \
@@ -99,7 +98,6 @@ CORESRC = $(BACNET_CORE)/abort.c \
$(BACNET_CORE)/proplist.c \
$(BACNET_CORE)/rd.c \
$(BACNET_CORE)/reject.c \
$(BACNET_CORE)/ringbuf.c \
$(BACNET_CORE)/rp.c \
$(BACNET_CORE)/rpm.c \
$(BACNET_CORE)/version.c \
+6 -6
View File
@@ -28,12 +28,12 @@
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include "bacdef.h"
#include "bacdcode.h"
#include "bacenum.h"
#include "config.h"
#include "ai.h"
#include "handlers.h"
#include "bacnet/bacdef.h"
#include "bacnet/bacdcode.h"
#include "bacnet/bacenum.h"
#include "bacnet/config.h"
#include "bacnet/basic/object/ai.h"
#include "bacnet/basic/services.h"
#ifndef MAX_ANALOG_INPUTS
#define MAX_ANALOG_INPUTS 2
+156 -156
View File
@@ -1,156 +1,156 @@
/* ****************************************************************************************************** */
/* LINKER SCRIPT */
/* */
/* */
/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
/* */
/* Any symbols defined in the Linker Script are automatically global and available to the rest of the */
/* program. */
/* */
/* To force the linker to use this LINKER SCRIPT, just add the -T AT91SAM7S256.LD */
/* directive to the linker flags in the makefile. For example, */
/* */
/* LFLAGS = -Map main.map -nostartfiles -T AT91SAM7S256.LD */
/* */
/* */
/* The order that the object files are listed in the makefile determines what .text section is */
/* placed first. */
/* */
/* For example: $(LD) $(LFLAGS) -o main.out crt.o main.o lowlevelinit.o */
/* */
/* crt.o is first in the list of objects, so it will be placed at address 0x00000000 */
/* */
/* */
/* The top of the stack (_stack_end) is (last_byte_of_ram +1) - 4 */
/* */
/* Therefore: _stack_end = (0x00020FFFF + 1) - 4 = 0x00210000 - 4 = 0x0020FFFC */
/* Therefore: _stack_end = (0x000203FFF + 1) - 4 = 0x00204000 - 4 = 0x00203FFC */
/* */
/* Note that this symbol (_stack_end) is automatically GLOBAL and will be used by the crt.s */
/* startup assembler routine to specify all stacks for the various ARM modes */
/* */
/* MEMORY MAP */
/* | | */
/* .-------->|---------------------------------|0x00210000 */
/* . | |0x0020FFFC <---------- _stack_end */
/* . | UDF Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FFEC */
/* . | | */
/* . | ABT Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FFDC */
/* . | | */
/* . | | */
/* . | FIQ Stack 128 bytes | */
/* . | | */
/* . | | */
/* RAM |---------------------------------|0x0020FF5C */
/* . | | */
/* . | | */
/* . | IRQ Stack 128 bytes | */
/* . | | */
/* . | | */
/* . |---------------------------------|0x0020FEDC */
/* . | | */
/* . | SVC Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FECC */
/* . | | */
/* . | stack area for user program | */
/* . | | */
/* . | | */
/* . | | */
/* . | free ram | */
/* . | | */
/* . |.................................|0x002006D8 <---------- _bss_end */
/* . | | */
/* . | .bss uninitialized variables | */
/* . |.................................|0x002006D0 <---------- _bss_start, _edata */
/* . | | */
/* . | .data initialized variables | */
/* . | | */
/* .-------->|_________________________________|0x00200000 */
/* */
/* */
/* .-------->|---------------------------------|0x00100000 */
/* . | | */
/* . | | */
/* . | free flash | */
/* . | | */
/* . | | */
/* . |.................................|0x000006D0 <---------- _bss_start, _edata */
/* . | | */
/* . | .data initialized variables | */
/* . | | */
/* . |---------------------------------|0x000006C4 <----------- _etext */
/* . | | */
/* . | C code | */
/* . | | */
/* . | | */
/* . |---------------------------------|0x00000118 main() */
/* . | | */
/* . | Startup Code (crt.s) | */
/* . | (assembler) | */
/* . | | */
/* . |---------------------------------|0x00000020 */
/* . | | */
/* . | Interrupt Vector Table | */
/* . | 32 bytes | */
/* .-------->|---------------------------------|0x00000000 _vec_reset */
/* */
/* */
/* Author: James P. Lynch May 12, 2007 */
/* */
/* ****************************************************************************************************** */
/* identify the Entry Point (_vec_reset is defined in file crt.s) */
ENTRY(_vec_reset)
/* specify the AT91SAM7S64 memory areas */
MEMORY
{
flash : ORIGIN = 0, LENGTH = 64K /* FLASH EPROM */
ram : ORIGIN = 0x00200000, LENGTH = 16K /* static RAM area */
}
/* define a global symbol _stack_end (see analysis in annotation above) */
/*_stack_end = 0x20FFFC;*/
_stack_end = 0x203FFC;
/* now define the output sections */
SECTIONS
{
. = 0; /* set location counter to address zero */
.text : /* collect all sections that should go into FLASH after startup */
{
*(.text*) /* all .text sections (code) */
*(.rodata) /* all .rodata sections (constants, strings, etc.) */
*(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* all .glue_7 sections (no idea what these are) */
*(.glue_7t) /* all .glue_7t sections (no idea what these are) */
_etext = .; /* define a global symbol _etext just after the last code byte */
} >flash /* put all the above into FLASH */
.data : /* collect all initialized .data sections that go into RAM */
{
_data = .; /* create a global symbol marking the start of the .data section */
*(.data*) /* all .data sections */
_edata = .; /* define a global symbol marking the end of the .data section */
} >ram AT >flash /* put all the above into RAM (but load the LMA initializer copy into FLASH) */
.bss : /* collect all uninitialized .bss sections that go into RAM */
{
_bss_start = .; /* define a global symbol marking the start of the .bss section */
*(.bss*) /* all .bss sections */
} >ram /* put all the above in RAM (it will be cleared in the startup code */
. = ALIGN(4); /* advance location counter to the next 32-bit boundary */
_bss_end = . ; /* define a global symbol marking the end of the .bss section */
}
_end = .; /* define a global symbol marking the end of application RAM */
/* ****************************************************************************************************** */
/* LINKER SCRIPT */
/* */
/* */
/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
/* */
/* Any symbols defined in the Linker Script are automatically global and available to the rest of the */
/* program. */
/* */
/* To force the linker to use this LINKER SCRIPT, just add the -T AT91SAM7S256.LD */
/* directive to the linker flags in the makefile. For example, */
/* */
/* LFLAGS = -Map main.map -nostartfiles -T AT91SAM7S256.LD */
/* */
/* */
/* The order that the object files are listed in the makefile determines what .text section is */
/* placed first. */
/* */
/* For example: $(LD) $(LFLAGS) -o main.out crt.o main.o lowlevelinit.o */
/* */
/* crt.o is first in the list of objects, so it will be placed at address 0x00000000 */
/* */
/* */
/* The top of the stack (_stack_end) is (last_byte_of_ram +1) - 4 */
/* */
/* Therefore: _stack_end = (0x00020FFFF + 1) - 4 = 0x00210000 - 4 = 0x0020FFFC */
/* Therefore: _stack_end = (0x000203FFF + 1) - 4 = 0x00204000 - 4 = 0x00203FFC */
/* */
/* Note that this symbol (_stack_end) is automatically GLOBAL and will be used by the crt.s */
/* startup assembler routine to specify all stacks for the various ARM modes */
/* */
/* MEMORY MAP */
/* | | */
/* .-------->|---------------------------------|0x00210000 */
/* . | |0x0020FFFC <---------- _stack_end */
/* . | UDF Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FFEC */
/* . | | */
/* . | ABT Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FFDC */
/* . | | */
/* . | | */
/* . | FIQ Stack 128 bytes | */
/* . | | */
/* . | | */
/* RAM |---------------------------------|0x0020FF5C */
/* . | | */
/* . | | */
/* . | IRQ Stack 128 bytes | */
/* . | | */
/* . | | */
/* . |---------------------------------|0x0020FEDC */
/* . | | */
/* . | SVC Stack 16 bytes | */
/* . | | */
/* . |---------------------------------|0x0020FECC */
/* . | | */
/* . | stack area for user program | */
/* . | | */
/* . | | */
/* . | | */
/* . | free ram | */
/* . | | */
/* . |.................................|0x002006D8 <---------- _bss_end */
/* . | | */
/* . | .bss uninitialized variables | */
/* . |.................................|0x002006D0 <---------- _bss_start, _edata */
/* . | | */
/* . | .data initialized variables | */
/* . | | */
/* .-------->|_________________________________|0x00200000 */
/* */
/* */
/* .-------->|---------------------------------|0x00100000 */
/* . | | */
/* . | | */
/* . | free flash | */
/* . | | */
/* . | | */
/* . |.................................|0x000006D0 <---------- _bss_start, _edata */
/* . | | */
/* . | .data initialized variables | */
/* . | | */
/* . |---------------------------------|0x000006C4 <----------- _etext */
/* . | | */
/* . | C code | */
/* . | | */
/* . | | */
/* . |---------------------------------|0x00000118 main() */
/* . | | */
/* . | Startup Code (crt.s) | */
/* . | (assembler) | */
/* . | | */
/* . |---------------------------------|0x00000020 */
/* . | | */
/* . | Interrupt Vector Table | */
/* . | 32 bytes | */
/* .-------->|---------------------------------|0x00000000 _vec_reset */
/* */
/* */
/* Author: James P. Lynch May 12, 2007 */
/* */
/* ****************************************************************************************************** */
/* identify the Entry Point (_vec_reset is defined in file crt.s) */
ENTRY(_vec_reset)
/* specify the AT91SAM7S64 memory areas */
MEMORY
{
flash : ORIGIN = 0, LENGTH = 64K /* FLASH EPROM */
ram : ORIGIN = 0x00200000, LENGTH = 16K /* static RAM area */
}
/* define a global symbol _stack_end (see analysis in annotation above) */
/*_stack_end = 0x20FFFC;*/
_stack_end = 0x203FFC;
/* now define the output sections */
SECTIONS
{
. = 0; /* set location counter to address zero */
.text : /* collect all sections that should go into FLASH after startup */
{
*(.text*) /* all .text sections (code) */
*(.rodata) /* all .rodata sections (constants, strings, etc.) */
*(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* all .glue_7 sections (no idea what these are) */
*(.glue_7t) /* all .glue_7t sections (no idea what these are) */
_etext = .; /* define a global symbol _etext just after the last code byte */
} >flash /* put all the above into FLASH */
.data : /* collect all initialized .data sections that go into RAM */
{
_data = .; /* create a global symbol marking the start of the .data section */
*(.data*) /* all .data sections */
_edata = .; /* define a global symbol marking the end of the .data section */
} >ram AT >flash /* put all the above into RAM (but load the LMA initializer copy into FLASH) */
.bss : /* collect all uninitialized .bss sections that go into RAM */
{
_bss_start = .; /* define a global symbol marking the start of the .bss section */
*(.bss*) /* all .bss sections */
} >ram /* put all the above in RAM (it will be cleared in the startup code */
. = ALIGN(4); /* advance location counter to the next 32-bit boundary */
_bss_end = . ; /* define a global symbol marking the end of the .bss section */
}
_end = .; /* define a global symbol marking the end of application RAM */
+7 -7
View File
@@ -27,13 +27,13 @@
#include <stdbool.h>
#include <stdint.h>
#include "bacdef.h"
#include "bacdcode.h"
#include "bacenum.h"
#include "bacapp.h"
#include "config.h" /* the custom stuff */
#include "av.h"
#include "handlers.h"
#include "bacnet/bacdef.h"
#include "bacnet/bacdcode.h"
#include "bacnet/bacenum.h"
#include "bacnet/bacapp.h"
#include "bacnet/config.h" /* the custom stuff */
#include "bacnet/basic/object/av.h"
#include "bacnet/basic/services.h"
#ifndef MAX_ANALOG_VALUES
#define MAX_ANALOG_VALUES 4
+138 -1008
View File
File diff suppressed because it is too large Load Diff
+6 -6
View File
@@ -28,12 +28,12 @@
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include "bacdef.h"
#include "bacdcode.h"
#include "bacenum.h"
#include "config.h"
#include "bi.h"
#include "handlers.h"
#include "bacnet/bacdef.h"
#include "bacnet/bacdcode.h"
#include "bacnet/bacenum.h"
#include "bacnet/config.h"
#include "bacnet/basic/object/bi.h"
#include "bacnet/basic/services.h"
#define MAX_BINARY_INPUTS 8
#if (MAX_BINARY_INPUTS > 9)
+6 -6
View File
@@ -28,12 +28,12 @@
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include "bacdef.h"
#include "bacdcode.h"
#include "bacenum.h"
#include "config.h" /* the custom stuff */
#include "bv.h"
#include "handlers.h"
#include "bacnet/bacdef.h"
#include "bacnet/bacdcode.h"
#include "bacnet/bacenum.h"
#include "bacnet/config.h" /* the custom stuff */
#include "bacnet/basic/object/bv.h"
#include "bacnet/basic/services.h"
#ifndef MAX_BINARY_VALUES
#define MAX_BINARY_VALUES 8
+319 -319
View File
@@ -1,319 +1,319 @@
/* ****************************************************************************************************** */
/* crt.s */
/* */
/* Assembly Language Startup Code for Atmel AT91SAM7S256 */
/* */
/* */
/* */
/* */
/* Author: James P Lynch May 12, 2007 */
/* ****************************************************************************************************** */
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000010 /* stack for "undefined instruction" interrupts is 16 bytes */
.set ABT_STACK_SIZE, 0x00000010 /* stack for "abort" interrupts is 16 bytes */
.set FIQ_STACK_SIZE, 0x00000080 /* stack for "FIQ" interrupts is 128 bytes */
.set IRQ_STACK_SIZE, 0X00000080 /* stack for "IRQ" normal interrupts is 128 bytes */
.set SVC_STACK_SIZE, 0x00000080 /* stack for "SVC" supervisor mode is 128 bytes */
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
.set ARM_MODE_USR, 0x10 /* Normal User Mode */
.set ARM_MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
.set ARM_MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
.set ARM_MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
.set ARM_MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
.set ARM_MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
.set ARM_MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
/* Addresses and offsets of AIC and PIO */
.set AT91C_BASE_AIC, 0xFFFFF000 /* (AIC) Base Address */
.set AT91C_PIOA_CODR, 0xFFFFF434 /* (PIO) Clear Output Data Register */
.set AT91C_AIC_IVR, 0xFFFFF100 /* (AIC) IRQ Interrupt Vector Register */
.set AT91C_AIC_FVR, 0xFFFFF104 /* (AIC) FIQ Interrupt Vector Register */
.set AIC_IVR, 256 /* IRQ Vector Register offset from base above */
.set AIC_FVR, 260 /* FIQ Vector Register offset from base above */
.set AIC_EOICR, 304 /* End of Interrupt Command Register */
/* identify all GLOBAL symbols */
.global _vec_reset
.global _vec_undef
.global _vec_swi
.global _vec_pabt
.global _vec_dabt
.global _vec_rsv
.global _vec_irq
.global _vec_fiq
.global AT91F_Irq_Handler
.global AT91F_Fiq_Handler
.global AT91F_Default_FIQ_handler
.global AT91F_Default_IRQ_handler
.global AT91F_Spurious_handler
.global AT91F_Dabt_Handler
.global AT91F_Pabt_Handler
.global AT91F_Undef_Handler
/* GNU assembler controls */
.text /* all assembler code that follows will go into .text section */
.arm /* compile for 32-bit ARM instruction set */
.align /* align section on 32-bit boundary */
/* ============================================================ */
/* VECTOR TABLE */
/* */
/* Must be located in FLASH at address 0x00000000 */
/* */
/* Easy to do if this file crt.s is first in the list */
/* for the linker step in the makefile, e.g. */
/* */
/* $(LD) $(LFLAGS) -o main.out crt.o main.o */
/* */
/* ============================================================ */
_vec_reset: b _init_reset /* RESET vector - must be at 0x00000000 */
_vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
_vec_swi: b _vec_swi /* Software Interrupt vector */
_vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
_vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
_vec_rsv: nop /* Reserved vector */
_vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
_vec_fiq: /* Fast interrupt request (FIQ) vector */
/* ======================================================================== */
/* Function: AT91F_Fiq_Handler */
/* */
/* The FIQ interrupt asserts when switch SW1 is pressed. */
/* */
/* This simple FIQ handler turns on LED3 (Port PA2). The LED3 will be */
/* turned off by the background loop in main() thus giving a visual */
/* indication that the interrupt has occurred. */
/* */
/* This FIQ_Handler supports non-nested FIQ interrupts (a FIQ interrupt */
/* cannot itself be interrupted). */
/* */
/* The Fast Interrupt Vector Register (AIC_FVR) is read to clear the */
/* interrupt. */
/* */
/* A global variable FiqCount is also incremented. */
/* */
/* Remember that switch SW1 is not debounced, so the FIQ interrupt may */
/* occur more than once for a single button push. */
/* */
/* Programmer: James P Lynch */
/* ======================================================================== */
AT91F_Fiq_Handler:
/* Adjust LR_irq */
sub lr, lr, #4
/* Read the AIC Fast Interrupt Vector register to clear the interrupt */
ldr r12, =AT91C_AIC_FVR
ldr r11, [r12]
/* Return from Fiq interrupt */
movs pc, lr
/* ======================================================================== */
/* _init_reset Handler */
/* */
/* RESET vector 0x00000000 branches to here. */
/* */
/* ARM microprocessor begins execution after RESET at address 0x00000000 */
/* in Supervisor mode with interrupts disabled! */
/* */
/* _init_reset handler: creates a stack for each ARM mode. */
/* sets up a stack pointer for each ARM mode. */
/* turns off interrupts in each mode. */
/* leaves CPU in SYS (System) mode. */
/* */
/* block copies the initializers to .data section */
/* clears the .bss section to zero */
/* */
/* branches to main( ) */
/* ======================================================================== */
.text /* all assembler code that follows will go into .text section */
.align /* align section on 32-bit boundary */
_init_reset:
/* Setup a stack for each mode with interrupts initially disabled. */
ldr r0, =_stack_end /* r0 = top-of-stack */
msr CPSR_c, #ARM_MODE_UND|I_BIT|F_BIT /* switch to Undefined Instruction Mode */
mov sp, r0 /* set stack pointer for UND mode */
sub r0, r0, #UND_STACK_SIZE /* adjust r0 past UND stack */
msr CPSR_c, #ARM_MODE_ABT|I_BIT|F_BIT /* switch to Abort Mode */
mov sp, r0 /* set stack pointer for ABT mode */
sub r0, r0, #ABT_STACK_SIZE /* adjust r0 past ABT stack */
msr CPSR_c, #ARM_MODE_FIQ|I_BIT|F_BIT /* switch to FIQ Mode */
mov sp, r0 /* set stack pointer for FIQ mode */
sub r0, r0, #FIQ_STACK_SIZE /* adjust r0 past FIQ stack */
msr CPSR_c, #ARM_MODE_IRQ|I_BIT|F_BIT /* switch to IRQ Mode */
mov sp, r0 /* set stack pointer for IRQ mode */
sub r0, r0, #IRQ_STACK_SIZE /* adjust r0 past IRQ stack */
msr CPSR_c, #ARM_MODE_SVC|I_BIT|F_BIT /* switch to Supervisor Mode */
mov sp, r0 /* set stack pointer for SVC mode */
sub r0, r0, #SVC_STACK_SIZE /* adjust r0 past SVC stack */
msr CPSR_c, #ARM_MODE_SYS|I_BIT|F_BIT /* switch to System Mode */
mov sp, r0 /* set stack pointer for SYS mode */
/* we now start execution in SYSTEM mode */
/* This is exactly like USER mode (same stack) */
/* but SYSTEM mode has more privileges */
/* copy initialized variables .data section (Copy from ROM to RAM) */
ldr R1, =_etext
ldr R2, =_data
ldr R3, =_edata
1: cmp R2, R3
ldrlo R0, [R1], #4
strlo R0, [R2], #4
blo 1b
/* Clear uninitialized variables .bss section (Zero init) */
mov R0, #0
ldr R1, =_bss_start
ldr R2, =_bss_end
2: cmp R1, R2
strlo R0, [R1], #4
blo 2b
/* Enter the C code */
b main
/* ======================================================================== */
/* Function: AT91F_Irq_Handler */
/* */
/* This IRQ_Handler supports nested interrupts (an IRQ interrupt can itself */
/* be interrupted). */
/* */
/* This handler re-enables interrupts and switches to "Supervisor" mode to */
/* prevent any corruption to the link and IP registers. */
/* */
/* The Interrupt Vector Register (AIC_IVR) is read to determine the address */
/* of the required interrupt service routine. The ISR routine can be a */
/* standard C function since this handler minds all the save/restore */
/* protocols. */
/* */
/* */
/* Programmers: */
/*--------------------------------------------------------------------------*/
/* ATMEL Microcontroller Software Support - ROUSSET - */
/*--------------------------------------------------------------------------*/
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS */
/* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */
/* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND */
/* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR */
/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR */
/* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT */
/* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE */
/* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* File source : Cstartup.s79 */
/* Object : Generic CStartup to AT91SAM7S256 */
/* 1.0 09/May/06 JPP : Creation */
/* */
/* */
/* Note: taken from Atmel web site (www.at91.com) */
/* Keil example project: AT91SAM7S-Interrupt_SAM7S */
/* ======================================================================== */
AT91F_Irq_Handler:
/* Manage Exception Entry */
/* Adjust and save LR_irq in IRQ stack */
sub lr, lr, #4
stmfd sp!, {lr}
/* Save r0 and SPSR (need to be saved for nested interrupt) */
mrs r14, SPSR
stmfd sp!, {r0,r14}
/* Write in the IVR to support Protect Mode */
/* No effect in Normal Mode */
/* De-assert the NIRQ and clear the source in Protect Mode */
ldr r14, =AT91C_BASE_AIC
ldr r0 , [r14, #AIC_IVR]
str r14, [r14, #AIC_IVR]
/* Enable Interrupt and Switch in Supervisor Mode */
msr CPSR_c, #ARM_MODE_SVC
/* Save scratch/used registers and LR in User Stack */
stmfd sp!, { r1-r3, r12, r14}
/* Branch to the routine pointed by the AIC_IVR */
mov r14, pc
bx r0
/* Manage Exception Exit */
/* Restore scratch/used registers and LR from User Stack */
ldmia sp!, { r1-r3, r12, r14}
/* Disable Interrupt and switch back in IRQ mode */
msr CPSR_c, #I_BIT | ARM_MODE_IRQ
/* Mark the End of Interrupt on the AIC */
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR]
/* Restore SPSR_irq and r0 from IRQ stack */
ldmia sp!, {r0,r14}
msr SPSR_cxsf, r14
/* Restore adjusted LR_irq from IRQ stack directly in the PC */
ldmia sp!, {pc}^
/* ======================================================================== */
/* Function: AT91F_Dabt_Handler */
/* */
/* Entered on Data Abort exception. */
/* Enters blink routine (3 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Dabt_Handler: mov R0, #3
b blinker
/* ======================================================================== */
/* Function: AT91F_Pabt_Handler */
/* */
/* Entered on Prefetch Abort exception. */
/* Enters blink routine (2 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Pabt_Handler: mov R0, #2
b blinker
/* ======================================================================== */
/* Function: AT91F_Undef_Handler */
/* */
/* Entered on Undefined Instruction exception. */
/* Enters blink routine (1 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Undef_Handler: mov R0, #1
b blinker
AT91F_Default_FIQ_handler: b AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler: b AT91F_Default_IRQ_handler
AT91F_Spurious_handler: b AT91F_Spurious_handler
.end
/* ****************************************************************************************************** */
/* crt.s */
/* */
/* Assembly Language Startup Code for Atmel AT91SAM7S256 */
/* */
/* */
/* */
/* */
/* Author: James P Lynch May 12, 2007 */
/* ****************************************************************************************************** */
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000010 /* stack for "undefined instruction" interrupts is 16 bytes */
.set ABT_STACK_SIZE, 0x00000010 /* stack for "abort" interrupts is 16 bytes */
.set FIQ_STACK_SIZE, 0x00000080 /* stack for "FIQ" interrupts is 128 bytes */
.set IRQ_STACK_SIZE, 0X00000080 /* stack for "IRQ" normal interrupts is 128 bytes */
.set SVC_STACK_SIZE, 0x00000080 /* stack for "SVC" supervisor mode is 128 bytes */
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
.set ARM_MODE_USR, 0x10 /* Normal User Mode */
.set ARM_MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
.set ARM_MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
.set ARM_MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
.set ARM_MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
.set ARM_MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
.set ARM_MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
/* Addresses and offsets of AIC and PIO */
.set AT91C_BASE_AIC, 0xFFFFF000 /* (AIC) Base Address */
.set AT91C_PIOA_CODR, 0xFFFFF434 /* (PIO) Clear Output Data Register */
.set AT91C_AIC_IVR, 0xFFFFF100 /* (AIC) IRQ Interrupt Vector Register */
.set AT91C_AIC_FVR, 0xFFFFF104 /* (AIC) FIQ Interrupt Vector Register */
.set AIC_IVR, 256 /* IRQ Vector Register offset from base above */
.set AIC_FVR, 260 /* FIQ Vector Register offset from base above */
.set AIC_EOICR, 304 /* End of Interrupt Command Register */
/* identify all GLOBAL symbols */
.global _vec_reset
.global _vec_undef
.global _vec_swi
.global _vec_pabt
.global _vec_dabt
.global _vec_rsv
.global _vec_irq
.global _vec_fiq
.global AT91F_Irq_Handler
.global AT91F_Fiq_Handler
.global AT91F_Default_FIQ_handler
.global AT91F_Default_IRQ_handler
.global AT91F_Spurious_handler
.global AT91F_Dabt_Handler
.global AT91F_Pabt_Handler
.global AT91F_Undef_Handler
/* GNU assembler controls */
.text /* all assembler code that follows will go into .text section */
.arm /* compile for 32-bit ARM instruction set */
.align /* align section on 32-bit boundary */
/* ============================================================ */
/* VECTOR TABLE */
/* */
/* Must be located in FLASH at address 0x00000000 */
/* */
/* Easy to do if this file crt.s is first in the list */
/* for the linker step in the makefile, e.g. */
/* */
/* $(LD) $(LFLAGS) -o main.out crt.o main.o */
/* */
/* ============================================================ */
_vec_reset: b _init_reset /* RESET vector - must be at 0x00000000 */
_vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
_vec_swi: b _vec_swi /* Software Interrupt vector */
_vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
_vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
_vec_rsv: nop /* Reserved vector */
_vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
_vec_fiq: /* Fast interrupt request (FIQ) vector */
/* ======================================================================== */
/* Function: AT91F_Fiq_Handler */
/* */
/* The FIQ interrupt asserts when switch SW1 is pressed. */
/* */
/* This simple FIQ handler turns on LED3 (Port PA2). The LED3 will be */
/* turned off by the background loop in main() thus giving a visual */
/* indication that the interrupt has occurred. */
/* */
/* This FIQ_Handler supports non-nested FIQ interrupts (a FIQ interrupt */
/* cannot itself be interrupted). */
/* */
/* The Fast Interrupt Vector Register (AIC_FVR) is read to clear the */
/* interrupt. */
/* */
/* A global variable FiqCount is also incremented. */
/* */
/* Remember that switch SW1 is not debounced, so the FIQ interrupt may */
/* occur more than once for a single button push. */
/* */
/* Programmer: James P Lynch */
/* ======================================================================== */
AT91F_Fiq_Handler:
/* Adjust LR_irq */
sub lr, lr, #4
/* Read the AIC Fast Interrupt Vector register to clear the interrupt */
ldr r12, =AT91C_AIC_FVR
ldr r11, [r12]
/* Return from Fiq interrupt */
movs pc, lr
/* ======================================================================== */
/* _init_reset Handler */
/* */
/* RESET vector 0x00000000 branches to here. */
/* */
/* ARM microprocessor begins execution after RESET at address 0x00000000 */
/* in Supervisor mode with interrupts disabled! */
/* */
/* _init_reset handler: creates a stack for each ARM mode. */
/* sets up a stack pointer for each ARM mode. */
/* turns off interrupts in each mode. */
/* leaves CPU in SYS (System) mode. */
/* */
/* block copies the initializers to .data section */
/* clears the .bss section to zero */
/* */
/* branches to main( ) */
/* ======================================================================== */
.text /* all assembler code that follows will go into .text section */
.align /* align section on 32-bit boundary */
_init_reset:
/* Setup a stack for each mode with interrupts initially disabled. */
ldr r0, =_stack_end /* r0 = top-of-stack */
msr CPSR_c, #ARM_MODE_UND|I_BIT|F_BIT /* switch to Undefined Instruction Mode */
mov sp, r0 /* set stack pointer for UND mode */
sub r0, r0, #UND_STACK_SIZE /* adjust r0 past UND stack */
msr CPSR_c, #ARM_MODE_ABT|I_BIT|F_BIT /* switch to Abort Mode */
mov sp, r0 /* set stack pointer for ABT mode */
sub r0, r0, #ABT_STACK_SIZE /* adjust r0 past ABT stack */
msr CPSR_c, #ARM_MODE_FIQ|I_BIT|F_BIT /* switch to FIQ Mode */
mov sp, r0 /* set stack pointer for FIQ mode */
sub r0, r0, #FIQ_STACK_SIZE /* adjust r0 past FIQ stack */
msr CPSR_c, #ARM_MODE_IRQ|I_BIT|F_BIT /* switch to IRQ Mode */
mov sp, r0 /* set stack pointer for IRQ mode */
sub r0, r0, #IRQ_STACK_SIZE /* adjust r0 past IRQ stack */
msr CPSR_c, #ARM_MODE_SVC|I_BIT|F_BIT /* switch to Supervisor Mode */
mov sp, r0 /* set stack pointer for SVC mode */
sub r0, r0, #SVC_STACK_SIZE /* adjust r0 past SVC stack */
msr CPSR_c, #ARM_MODE_SYS|I_BIT|F_BIT /* switch to System Mode */
mov sp, r0 /* set stack pointer for SYS mode */
/* we now start execution in SYSTEM mode */
/* This is exactly like USER mode (same stack) */
/* but SYSTEM mode has more privileges */
/* copy initialized variables .data section (Copy from ROM to RAM) */
ldr R1, =_etext
ldr R2, =_data
ldr R3, =_edata
1: cmp R2, R3
ldrlo R0, [R1], #4
strlo R0, [R2], #4
blo 1b
/* Clear uninitialized variables .bss section (Zero init) */
mov R0, #0
ldr R1, =_bss_start
ldr R2, =_bss_end
2: cmp R1, R2
strlo R0, [R1], #4
blo 2b
/* Enter the C code */
b main
/* ======================================================================== */
/* Function: AT91F_Irq_Handler */
/* */
/* This IRQ_Handler supports nested interrupts (an IRQ interrupt can itself */
/* be interrupted). */
/* */
/* This handler re-enables interrupts and switches to "Supervisor" mode to */
/* prevent any corruption to the link and IP registers. */
/* */
/* The Interrupt Vector Register (AIC_IVR) is read to determine the address */
/* of the required interrupt service routine. The ISR routine can be a */
/* standard C function since this handler minds all the save/restore */
/* protocols. */
/* */
/* */
/* Programmers: */
/*--------------------------------------------------------------------------*/
/* ATMEL Microcontroller Software Support - ROUSSET - */
/*--------------------------------------------------------------------------*/
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS */
/* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */
/* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND */
/* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR */
/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR */
/* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT */
/* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE */
/* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* File source : Cstartup.s79 */
/* Object : Generic CStartup to AT91SAM7S256 */
/* 1.0 09/May/06 JPP : Creation */
/* */
/* */
/* Note: taken from Atmel web site (www.at91.com) */
/* Keil example project: AT91SAM7S-Interrupt_SAM7S */
/* ======================================================================== */
AT91F_Irq_Handler:
/* Manage Exception Entry */
/* Adjust and save LR_irq in IRQ stack */
sub lr, lr, #4
stmfd sp!, {lr}
/* Save r0 and SPSR (need to be saved for nested interrupt) */
mrs r14, SPSR
stmfd sp!, {r0,r14}
/* Write in the IVR to support Protect Mode */
/* No effect in Normal Mode */
/* De-assert the NIRQ and clear the source in Protect Mode */
ldr r14, =AT91C_BASE_AIC
ldr r0 , [r14, #AIC_IVR]
str r14, [r14, #AIC_IVR]
/* Enable Interrupt and Switch in Supervisor Mode */
msr CPSR_c, #ARM_MODE_SVC
/* Save scratch/used registers and LR in User Stack */
stmfd sp!, { r1-r3, r12, r14}
/* Branch to the routine pointed by the AIC_IVR */
mov r14, pc
bx r0
/* Manage Exception Exit */
/* Restore scratch/used registers and LR from User Stack */
ldmia sp!, { r1-r3, r12, r14}
/* Disable Interrupt and switch back in IRQ mode */
msr CPSR_c, #I_BIT | ARM_MODE_IRQ
/* Mark the End of Interrupt on the AIC */
ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR]
/* Restore SPSR_irq and r0 from IRQ stack */
ldmia sp!, {r0,r14}
msr SPSR_cxsf, r14
/* Restore adjusted LR_irq from IRQ stack directly in the PC */
ldmia sp!, {pc}^
/* ======================================================================== */
/* Function: AT91F_Dabt_Handler */
/* */
/* Entered on Data Abort exception. */
/* Enters blink routine (3 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Dabt_Handler: mov R0, #3
b blinker
/* ======================================================================== */
/* Function: AT91F_Pabt_Handler */
/* */
/* Entered on Prefetch Abort exception. */
/* Enters blink routine (2 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Pabt_Handler: mov R0, #2
b blinker
/* ======================================================================== */
/* Function: AT91F_Undef_Handler */
/* */
/* Entered on Undefined Instruction exception. */
/* Enters blink routine (1 blinks followed by a pause) */
/* processor hangs in the blink loop forever */
/* */
/* ======================================================================== */
AT91F_Undef_Handler: mov R0, #1
b blinker
AT91F_Default_FIQ_handler: b AT91F_Default_FIQ_handler
AT91F_Default_IRQ_handler: b AT91F_Default_IRQ_handler
AT91F_Spurious_handler: b AT91F_Spurious_handler
.end
+19 -16
View File
@@ -27,24 +27,27 @@
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include "bacdef.h"
#include "bacdcode.h"
#include "bacstr.h"
#include "bacenum.h"
#include "apdu.h"
#include "dcc.h"
#include "datalink.h"
#include "bacnet/bacdef.h"
#include "bacnet/bacdcode.h"
#include "bacnet/bacstr.h"
#include "bacnet/bacenum.h"
#include "bacnet/apdu.h"
#include "bacnet/dcc.h"
#include "bacnet/datalink/datalink.h"
#include "rs485.h"
#include "version.h"
#include "handlers.h"
#include "bacnet/version.h"
#include "bacnet/basic/services.h"
/* objects */
#include "device.h"
#include "ai.h"
#include "av.h"
#include "bi.h"
#include "bv.h"
#include "wp.h"
#include "dcc.h"
#include "bacnet/basic/object/device.h"
#include "bacnet/basic/object/ai.h"
#include "bacnet/basic/object/av.h"
#include "bacnet/basic/object/bi.h"
#include "bacnet/basic/object/bv.h"
#include "bacnet/wp.h"
#include "bacnet/dcc.h"
/* current version of the BACnet stack */
static const char *BACnet_Version = BACNET_VERSION_TEXT;
/* forward prototype */
int Device_Read_Property_Local(
+9 -9
View File
@@ -36,16 +36,16 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include "bacdef.h"
#include "dlmstp.h"
#include "mstpdef.h"
#include "bacnet/bacdef.h"
#include "bacnet/datalink/dlmstp.h"
#include "bacnet/datalink/mstpdef.h"
#include "bacnet/npdu.h"
#include "bacnet/bits.h"
#include "bacnet/bytes.h"
#include "bacnet/bacaddr.h"
#include "bacnet/basic/sys/ringbuf.h"
#include "bacnet/datalink/crc.h"
#include "rs485.h"
#include "crc.h"
#include "npdu.h"
#include "bits.h"
#include "bytes.h"
#include "bacaddr.h"
#include "ringbuf.h"
#include "timer.h"
#include "board.h"
+1
View File
@@ -16,6 +16,7 @@
/* Taken from the Yahoo LPC2000 User's Group - Files Section 'UT050418A.ZIP' */
/* Specifically, the module armVIC.c with the include file references removed */
/* ********************************************************************************************** */
#include "at91sam7s256.h"
#include "isr.h"
#define IRQ_MASK 0x00000080
+11 -11
View File
@@ -33,17 +33,17 @@
#include <stdint.h>
/* BACnet */
#include "rs485.h"
#include "datalink.h"
#include "npdu.h"
#include "apdu.h"
#include "dcc.h"
#include "iam.h"
#include "handlers.h"
#include "client.h"
#include "device.h"
#include "dcc.h"
#include "iam.h"
#include "txbuf.h"
#include "bacnet/datalink/datalink.h"
#include "bacnet/npdu.h"
#include "bacnet/apdu.h"
#include "bacnet/dcc.h"
#include "bacnet/iam.h"
#include "bacnet/basic/services.h"
#include "bacnet/basic/services.h"
#include "bacnet/basic/object/device.h"
#include "bacnet/dcc.h"
#include "bacnet/iam.h"
#include "bacnet/basic/tsm/tsm.h"
/* ******************************************************* */
/* FIXME: use header files? External References */
+1 -1
View File
@@ -32,7 +32,7 @@
#include <stdbool.h>
#include <stdlib.h>
#include <stdio.h>
#include "timer.h"
#include "bacnet/basic/sys/mstimer.h"
/* This file has been customized for use with UART0
on the AT91SAM7S-EK */
+1 -1
View File
@@ -42,7 +42,7 @@
**********************************************************/
#include <stdint.h>
#include "board.h"
#include "dlmstp.h"
#include "bacnet/datalink/dlmstp.h"
/* global variable counts interrupts */
volatile unsigned long Timer_Milliseconds;