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fixed svn EOL and MIME settings.

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This commit is contained in:
skarg
2012-04-06 23:24:43 +00:00
parent 62eea57d4b
commit d1f4e78cba
57 changed files with 11387 additions and 11363 deletions
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bacnet-stack/ports/stm32f10x/bacnet.ewp
+2037 -2037
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File diff suppressed because it is too large Load Diff
bacnet-stack/ports/stm32f10x/bacnet.eww
+10 -10
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@@ -1,10 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\bacnet.ewp</path>
</project>
<batchBuild/>
</workspace>
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\bacnet.ewp</path>
</project>
<batchBuild/>
</workspace>
bacnet-stack/ports/stm32f10x/readme.txt
+31 -31
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@@ -1,31 +1,31 @@
This port was done with the STM32 ARM Cortex-M3 STM32F103RGT6 on
a STM32 Discovery Kit using the STM32 CMSIS library and drivers
and IAR EWARM 6.10 compiler.
The CMSIS library was 21MiB compressed, so I didn't include it
as part of this project. The CMSIS and drivers
can be found by following the 'Click here for STM32
embedded firmware' link from the resources page:
http://www.st.com/stonline/stappl/resourceSelector/app?page=resourceSelector&doctype=FIRMWARE&SubClassID=1169
There will be a list of firmware resources.
The library you are looking for is in the
‘ARM-based 32-bit MCU STM32F10xxx standard peripheral library’.
Download the
‘ARM-based 32-bit MCU STM32F10xxx standard peripheral library’
and the CMSIS library can be found in
'…\STM32F10x_StdPeriph_Lib_V3.4.0\Libraries\CMSIS\CM3'.
Copy the contents of 'CMSIS' to the 'CMSIS' folder in this project.
and the drivers library can be found in
'…\STM32F10x_StdPeriph_Lib_V3.4.0\Libraries\STM32F10x_StdPeriph_Driver'.
Copy the contents of 'STM32F10x_StdPeriph_Driver' to the
'drivers' folder in this project.
The hardware interface only uses the USART and a peripheral pin
(RTS) for the MS/TP RS-485 interface, and the System Clock for
the millisecond timer.
It was created for the STM32 Design Challenge on March 20, 2011,
by Steve Karg. Although the design didn't win any awards,
it was one of the six finalists and was on display at the
STM booth at the 2010 Embedded Systems Conference West.
http://www.stm32challenge.com/
This port was done with the STM32 ARM Cortex-M3 STM32F103RGT6 on
a STM32 Discovery Kit using the STM32 CMSIS library and drivers
and IAR EWARM 6.10 compiler.
The CMSIS library was 21MiB compressed, so I didn't include it
as part of this project. The CMSIS and drivers
can be found by following the 'Click here for STM32
embedded firmware' link from the resources page:
http://www.st.com/stonline/stappl/resourceSelector/app?page=resourceSelector&doctype=FIRMWARE&SubClassID=1169
There will be a list of firmware resources.
The library you are looking for is in the
‘ARM-based 32-bit MCU STM32F10xxx standard peripheral library’.
Download the
‘ARM-based 32-bit MCU STM32F10xxx standard peripheral library’
and the CMSIS library can be found in
'…\STM32F10x_StdPeriph_Lib_V3.4.0\Libraries\CMSIS\CM3'.
Copy the contents of 'CMSIS' to the 'CMSIS' folder in this project.
and the drivers library can be found in
'…\STM32F10x_StdPeriph_Lib_V3.4.0\Libraries\STM32F10x_StdPeriph_Driver'.
Copy the contents of 'STM32F10x_StdPeriph_Driver' to the
'drivers' folder in this project.
The hardware interface only uses the USART and a peripheral pin
(RTS) for the MS/TP RS-485 interface, and the System Clock for
the millisecond timer.
It was created for the STM32 Design Challenge on March 20, 2011,
by Steve Karg. Although the design didn't win any awards,
it was one of the six finalists and was on display at the
STM booth at the 2010 Embedded Systems Conference West.
http://www.stm32challenge.com/
bacnet-stack/ports/stm32f10x/stm32f10x_flash.icf
+30 -30
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@@ -1,31 +1,31 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };