adjust root folder
This commit is contained in:
Steve Karg
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/**
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* \file
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*
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* \brief Common IOPORT service main header file for AVR, UC3 and ARM
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* architectures.
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*
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* Copyright (c) 2012 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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||||
* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef IOPORT_H
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#define IOPORT_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <parts.h>
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#include <compiler.h>
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/**
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* \defgroup ioport_group Common IOPORT API
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*
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* See \ref ioport_quickstart.
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*
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* This is common IOPORT service for GPIO pin configuration and control in a
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* standardized manner across the MEGA, MEGA_RF, XMEGA, UC3 and ARM devices.
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*
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* Port pin control code is optimized for each platform, and should produce
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* both compact and fast execution times when used with constant values.
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*
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* \section dependencies Dependencies
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* This driver depends on the following modules:
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* - \ref sysclk_group for clock speed and functions.
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* @{
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*/
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/**
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* \def IOPORT_CREATE_PIN(port, pin)
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* \brief Create IOPORT pin number
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*
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* Create a IOPORT pin number for use with the IOPORT functions.
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*
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* \param port IOPORT port (e.g. PORTA, PA or PIOA depending on chosen
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* architecture)
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* \param pin IOPORT zero-based index of the I/O pin
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*/
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/** \brief IOPORT pin directions */
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enum ioport_direction
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{
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IOPORT_DIR_INPUT, /*!< IOPORT input direction */
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IOPORT_DIR_OUTPUT, /*!< IOPORT output direction */
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};
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/** \brief IOPORT levels */
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enum ioport_value
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{
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IOPORT_PIN_LEVEL_LOW, /*!< IOPORT pin value low */
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IOPORT_PIN_LEVEL_HIGH, /*!< IOPORT pin value high */
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};
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#if MEGA_RF
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/** \brief IOPORT edge sense modes */
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enum ioport_sense
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{
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IOPORT_SENSE_LEVEL, /*!< IOPORT sense low level */
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IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
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IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
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IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
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};
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#elif SAM && !SAM4L
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/** \brief IOPORT edge sense modes */
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enum ioport_sense
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{
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IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
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IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
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IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
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IOPORT_SENSE_LEVEL_LOW, /*!< IOPORT sense low level */
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IOPORT_SENSE_LEVEL_HIGH, /*!< IOPORT sense High level */
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};
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#else
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enum ioport_sense
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{
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IOPORT_SENSE_BOTHEDGES, /*!< IOPORT sense both rising and falling edges */
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IOPORT_SENSE_RISING, /*!< IOPORT sense rising edges */
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IOPORT_SENSE_FALLING, /*!< IOPORT sense falling edges */
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};
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#endif
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#if XMEGA
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# include "xmega/ioport.h"
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# if defined(IOPORT_XMEGA_COMPAT)
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# include "xmega/ioport_compat.h"
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# endif
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#elif MEGA
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# include "mega/ioport.h"
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#elif UC3
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# include "uc3/ioport.h"
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#elif SAM
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# if SAM4L
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# include "sam/ioport_gpio.h"
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# else
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# include "sam/ioport_pio.h"
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# endif
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#endif
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/**
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* \brief Initializes the IOPORT service, ready for use.
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*
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* This function must be called before using any other functions in the IOPORT
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* service.
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*/
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static inline void ioport_init (void)
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{
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arch_ioport_init ();
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}
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/**
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* \brief Enable an IOPORT pin, based on a pin created with \ref
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* IOPORT_CREATE_PIN().
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*
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* \param pin IOPORT pin to enable
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*/
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static inline void ioport_enable_pin (ioport_pin_t pin)
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{
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arch_ioport_enable_pin (pin);
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}
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/**
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* \brief Enable multiple pins in a single IOPORT port.
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*
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* \param port IOPORT port to enable
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* \param mask Mask of pins within the port to enable
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*/
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static inline void ioport_enable_port (ioport_port_t port,
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ioport_port_mask_t mask)
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{
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arch_ioport_enable_port (port, mask);
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}
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/**
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* \brief Disable IOPORT pin, based on a pin created with \ref
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* IOPORT_CREATE_PIN().
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*
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* \param pin IOPORT pin to disable
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*/
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static inline void ioport_disable_pin (ioport_pin_t pin)
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{
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arch_ioport_disable_pin (pin);
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}
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/**
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* \brief Disable multiple pins in a single IOPORT port.
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*
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* \param port IOPORT port to disable
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* \param mask Pin mask of pins to disable
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*/
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static inline void ioport_disable_port (ioport_port_t port,
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ioport_port_mask_t mask)
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{
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arch_ioport_disable_port (port, mask);
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}
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/**
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* \brief Set multiple pin modes in a single IOPORT port, such as pull-up,
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* pull-down, etc. configuration.
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*
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* \param port IOPORT port to configure
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* \param mask Pin mask of pins to configure
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* \param mode Mode masks to configure for the specified pins (\ref
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* ioport_modes)
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*/
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static inline void ioport_set_port_mode (ioport_port_t port,
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ioport_port_mask_t mask,
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ioport_mode_t mode)
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{
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arch_ioport_set_port_mode (port, mask, mode);
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}
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/**
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* \brief Set pin mode for one single IOPORT pin.
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*
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* \param pin IOPORT pin to configure
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* \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
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*/
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static inline void ioport_set_pin_mode (ioport_pin_t pin,
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ioport_mode_t mode)
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{
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arch_ioport_set_pin_mode (pin, mode);
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}
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/**
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* \brief Reset multiple pin modes in a specified IOPORT port to defaults.
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*
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* \param port IOPORT port to configure
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* \param mask Mask of pins whose mode configuration is to be reset
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*/
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static inline void ioport_reset_port_mode (ioport_port_t port,
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ioport_port_mask_t mask)
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{
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arch_ioport_set_port_mode (port, mask, 0);
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}
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/**
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* \brief Reset pin mode configuration for a single IOPORT pin
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*
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* \param pin IOPORT pin to configure
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*/
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static inline void ioport_reset_pin_mode (ioport_pin_t pin)
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{
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arch_ioport_set_pin_mode (pin, 0);
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}
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/**
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* \brief Set I/O direction for a group of pins in a single IOPORT.
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*
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* \param port IOPORT port to configure
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* \param mask Pin mask of pins to configure
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* \param dir Direction to set for the specified pins (\ref ioport_direction)
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*/
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static inline void ioport_set_port_dir (ioport_port_t port,
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ioport_port_mask_t mask,
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enum ioport_direction dir)
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{
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arch_ioport_set_port_dir (port, mask, dir);
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}
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/**
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* \brief Set direction for a single IOPORT pin.
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*
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* \param pin IOPORT pin to configure
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* \param dir Direction to set for the specified pin (\ref ioport_direction)
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*/
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static inline void ioport_set_pin_dir (ioport_pin_t pin,
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enum ioport_direction dir)
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{
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arch_ioport_set_pin_dir (pin, dir);
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}
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/**
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* \brief Set an IOPORT pin to a specified logical value.
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*
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* \param pin IOPORT pin to configure
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* \param level Logical value of the pin
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*/
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static inline void ioport_set_pin_level (ioport_pin_t pin, bool level)
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{
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arch_ioport_set_pin_level (pin, level);
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}
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/**
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* \brief Set a group of IOPORT pins in a single port to a specified logical
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* value.
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*
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* \param port IOPORT port to write to
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* \param mask Pin mask of pins to modify
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* \param level Level of the pins to be modified
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*/
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static inline void ioport_set_port_level (ioport_port_t port,
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ioport_port_mask_t mask,
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ioport_port_mask_t level)
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{
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arch_ioport_set_port_level (port, mask, level);
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}
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/**
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* \brief Get current value of an IOPORT pin, which has been configured as an
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* input.
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*
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* \param pin IOPORT pin to read
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* \return Current logical value of the specified pin
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*/
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static inline bool ioport_get_pin_level (ioport_pin_t pin)
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{
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return arch_ioport_get_pin_level (pin);
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}
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/**
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* \brief Get current value of several IOPORT pins in a single port, which have
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* been configured as an inputs.
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*
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* \param port IOPORT port to read
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* \param mask Pin mask of pins to read
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* \return Logical levels of the specified pins from the read port, returned as
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* a mask.
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*/
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static inline ioport_port_mask_t ioport_get_port_level (ioport_pin_t port,
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ioport_port_mask_t
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mask)
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{
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return arch_ioport_get_port_level (port, mask);
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}
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/**
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* \brief Toggle the value of an IOPORT pin, which has previously configured as
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* an output.
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*
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* \param pin IOPORT pin to toggle
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*/
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static inline void ioport_toggle_pin_level (ioport_pin_t pin)
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{
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arch_ioport_toggle_pin_level (pin);
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}
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/**
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* \brief Toggle the values of several IOPORT pins located in a single port.
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*
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* \param port IOPORT port to modify
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* \param mask Pin mask of pins to toggle
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*/
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static inline void ioport_toggle_port_level (ioport_port_t port,
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ioport_port_mask_t mask)
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{
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arch_ioport_toggle_port_level (port, mask);
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}
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/**
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* \brief Set the pin sense mode of a single IOPORT pin.
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*
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* \param pin IOPORT pin to configure
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* \param pin_sense Edge to sense for the pin (\ref ioport_sense)
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*/
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static inline void ioport_set_pin_sense_mode (ioport_pin_t pin,
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enum ioport_sense pin_sense)
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{
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arch_ioport_set_pin_sense_mode (pin, pin_sense);
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}
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||||
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/**
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* \brief Set the pin sense mode of a multiple IOPORT pins on a single port.
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*
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* \param port IOPORT port to configure
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* \param mask Bitmask if pins whose edge sense is to be configured
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* \param pin_sense Edge to sense for the pins (\ref ioport_sense)
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*/
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static inline void ioport_set_port_sense_mode (ioport_port_t port,
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ioport_port_mask_t mask,
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enum ioport_sense pin_sense)
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{
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arch_ioport_set_port_sense_mode (port, mask, pin_sense);
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||||
}
|
||||
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||||
/**
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* \brief Convert a pin ID into a its port ID.
|
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*
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* \param pin IOPORT pin ID to convert
|
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* \retval Port ID for the given pin ID
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||||
*/
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||||
static inline ioport_port_t ioport_pin_to_port_id (ioport_pin_t pin)
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||||
{
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return arch_ioport_pin_to_port_id (pin);
|
||||
}
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||||
|
||||
/**
|
||||
* \brief Convert a pin ID into a bitmask mask for the given pin on its port.
|
||||
*
|
||||
* \param pin IOPORT pin ID to convert
|
||||
* \retval Bitmask with a bit set that corresponds to the given pin ID in its port
|
||||
*/
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||||
static inline ioport_port_mask_t ioport_pin_to_mask (ioport_pin_t pin)
|
||||
{
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||||
return arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
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||||
/**
|
||||
* \page ioport_quickstart Quick start guide for the common IOPORT service
|
||||
*
|
||||
* This is the quick start guide for the \ref ioport_group, with
|
||||
* step-by-step instructions on how to configure and use the service in a
|
||||
* selection of use cases.
|
||||
*
|
||||
* The use cases contain several code fragments. The code fragments in the
|
||||
* steps for setup can be copied into a custom initialization function, while
|
||||
* the steps for usage can be copied into, e.g., the main application function.
|
||||
*
|
||||
* \section ioport_quickstart_basic Basic use case
|
||||
* In this use case we will configure one IO pin for button input and one for
|
||||
* LED control. Then it will read the button state and output it on the LED.
|
||||
*
|
||||
* \section ioport_quickstart_basic_setup Setup steps
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_setup_code Example code
|
||||
* \code
|
||||
* #define MY_LED IOPORT_CREATE_PIN(PORTA, 5)
|
||||
* #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6)
|
||||
*
|
||||
* ioport_init();
|
||||
*
|
||||
* ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT);
|
||||
* ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT);
|
||||
* ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP);
|
||||
* \endcode
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_setup_flow Workflow
|
||||
* -# It's useful to give the GPIOs symbolic names and this can be done with
|
||||
* the \ref IOPORT_CREATE_PIN macro. We define one for a LED and one for a
|
||||
* button.
|
||||
* - \code
|
||||
* #define MY_LED IOPORT_CREATE_PIN(PORTA, 5)
|
||||
* #define MY_BUTTON IOPORT_CREATE_PIN(PORTA, 6)
|
||||
* \endcode
|
||||
* - \note The usefulness of the \ref IOPORT_CREATE_PIN macro and port names
|
||||
* differ between architectures:
|
||||
* - MEGA, MEGA_RF and XMEGA: Use \ref IOPORT_CREATE_PIN macro with port definitions
|
||||
* PORTA, PORTB ...
|
||||
* - UC3: Most convenient to pick up the device header file pin definition
|
||||
* and us it directly. E.g.: AVR32_PIN_PB06
|
||||
* - SAM: Most convenient to pick up the device header file pin definition
|
||||
* and us it directly. E.g.: PIO_PA5_IDX<br>
|
||||
* \ref IOPORT_CREATE_PIN can also be used with port definitions
|
||||
* PIOA, PIOB ...
|
||||
* -# Initialize the ioport service. This typically enables the IO module if
|
||||
* needed.
|
||||
* - \code ioport_init(); \endcode
|
||||
* -# Set the LED GPIO as output:
|
||||
* - \code ioport_set_pin_dir(MY_LED, IOPORT_DIR_OUTPUT); \endcode
|
||||
* -# Set the button GPIO as input:
|
||||
* - \code ioport_set_pin_dir(MY_BUTTON, IOPORT_DIR_INPUT); \endcode
|
||||
* -# Enable pull-up for the button GPIO:
|
||||
* - \code ioport_set_pin_mode(MY_BUTTON, IOPORT_MODE_PULLUP); \endcode
|
||||
*
|
||||
* \section ioport_quickstart_basic_usage Usage steps
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_usage_code Example code
|
||||
* \code
|
||||
* bool value;
|
||||
*
|
||||
* value = ioport_get_pin_level(MY_BUTTON);
|
||||
* ioport_set_pin_level(MY_LED, value);
|
||||
* \endcode
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_usage_flow Workflow
|
||||
* -# Define a boolean variable for state storage:
|
||||
* - \code bool value; \endcode
|
||||
* -# Read out the button level into variable value:
|
||||
* - \code value = ioport_get_pin_level(MY_BUTTON); \endcode
|
||||
* -# Set the LED to read out value from the button:
|
||||
* - \code ioport_set_pin_level(MY_LED, value); \endcode
|
||||
*
|
||||
* \section ioport_quickstart_advanced Advanced use cases
|
||||
* - \subpage ioport_quickstart_use_case_1 : Port access
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page ioport_quickstart_use_case_1 Advanced use case doing port access
|
||||
*
|
||||
* In this case we will read out the pins from one whole port and write the
|
||||
* read value to another port.
|
||||
*
|
||||
* \section ioport_quickstart_use_case_1_setup Setup steps
|
||||
*
|
||||
* \subsection ioport_quickstart_use_case_1_setup_code Example code
|
||||
* \code
|
||||
* #define IN_PORT IOPORT_PORTA
|
||||
* #define OUT_PORT IOPORT_PORTB
|
||||
* #define MASK 0x00000060
|
||||
*
|
||||
* ioport_init();
|
||||
*
|
||||
* ioport_set_port_dir(IN_PORT, MASK, IOPORT_DIR_INPUT);
|
||||
* ioport_set_port_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT);
|
||||
* \endcode
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_setup_flow Workflow
|
||||
* -# It's useful to give the ports symbolic names:
|
||||
* - \code
|
||||
* #define IN_PORT IOPORT_PORTA
|
||||
* #define OUT_PORT IOPORT_PORTB
|
||||
* \endcode
|
||||
* - \note The port names differ between architectures:
|
||||
* - MEGA_RF, MEGA and XMEGA: There are predefined names for ports: IOPORT_PORTA,
|
||||
* IOPORT_PORTB ...
|
||||
* - UC3: Use the index value of the different IO blocks: 0, 1 ...
|
||||
* - SAM: There are predefined names for ports: IOPORT_PIOA, IOPORT_PIOB
|
||||
* ...
|
||||
* -# Also useful to define a mask for the bits to work with:
|
||||
* - \code #define MASK 0x00000060 \endcode
|
||||
* -# Initialize the ioport service. This typically enables the IO module if
|
||||
* needed.
|
||||
* - \code ioport_init(); \endcode
|
||||
* -# Set one of the ports as input:
|
||||
* - \code ioport_set_pin_dir(IN_PORT, MASK, IOPORT_DIR_INPUT); \endcode
|
||||
* -# Set the other port as output:
|
||||
* - \code ioport_set_pin_dir(OUT_PORT, MASK, IOPORT_DIR_OUTPUT); \endcode
|
||||
*
|
||||
* \section ioport_quickstart_basic_usage Usage steps
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_usage_code Example code
|
||||
* \code
|
||||
* ioport_port_mask_t value;
|
||||
*
|
||||
* value = ioport_get_port_level(IN_PORT, MASK);
|
||||
* ioport_set_port_level(OUT_PORT, MASK, value);
|
||||
* \endcode
|
||||
*
|
||||
* \subsection ioport_quickstart_basic_usage_flow Workflow
|
||||
* -# Define a variable for port date storage:
|
||||
* - \code ioport_port_mask_t value; \endcode
|
||||
* -# Read out from one port:
|
||||
* - \code value = ioport_get_port_level(IN_PORT, MASK); \endcode
|
||||
* -# Put the read data out on the other port:
|
||||
* - \code ioport_set_port_level(OUT_PORT, MASK, value); \endcode
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* IOPORT_H */
|
||||
@@ -0,0 +1,367 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief XMEGA architecture specific IOPORT service implementation header file.
|
||||
*
|
||||
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#ifndef IOPORT_XMEGA_H
|
||||
#define IOPORT_XMEGA_H
|
||||
|
||||
#define IOPORT_CREATE_PIN(port, pin) ((IOPORT_ ## port) * 8 + (pin))
|
||||
#define IOPORT_BASE_ADDRESS 0x600
|
||||
#define IOPORT_PORT_OFFSET 0x20
|
||||
|
||||
/** \name IOPORT port numbers */
|
||||
/** @{ */
|
||||
#if !XMEGA_B3
|
||||
# define IOPORT_PORTA 0
|
||||
#endif
|
||||
|
||||
#define IOPORT_PORTB 1
|
||||
#define IOPORT_PORTC 2
|
||||
#define IOPORT_PORTD 3
|
||||
|
||||
#if !XMEGA_B3
|
||||
# define IOPORT_PORTE 4
|
||||
#endif
|
||||
|
||||
#if XMEGA_A1 || XMEGA_A1U || XMEGA_A3 || XMEGA_A3U || XMEGA_A3B || XMEGA_A3BU ||\
|
||||
XMEGA_C3 || XMEGA_D3
|
||||
# define IOPORT_PORTF 5
|
||||
#endif
|
||||
|
||||
#if XMEGA_B1 || XMEGA_B3
|
||||
# define IOPORT_PORTG 6
|
||||
#endif
|
||||
|
||||
#if XMEGA_A1 || XMEGA_A1U
|
||||
# define IOPORT_PORTH 7
|
||||
# define IOPORT_PORTJ 8
|
||||
# define IOPORT_PORTK 9
|
||||
#endif
|
||||
|
||||
#if XMEGA_B1 || XMEGA_B3
|
||||
# define IOPORT_PORTM 11
|
||||
#endif
|
||||
|
||||
#if XMEGA_A1 || XMEGA_A1U
|
||||
# define IOPORT_PORTQ 14
|
||||
#endif
|
||||
|
||||
#define IOPORT_PORTR 15
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \weakgroup ioport_group
|
||||
* \section ioport_modes IOPORT Modes
|
||||
*
|
||||
* For details on these please see the XMEGA Manual.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name IOPORT Mode bit definitions */
|
||||
/** @{ */
|
||||
#define IOPORT_MODE_TOTEM (0x00 << 3) /*!< Totem-pole */
|
||||
#define IOPORT_MODE_BUSKEEPER (0x01 << 3) /*!< Buskeeper */
|
||||
#define IOPORT_MODE_PULLDOWN (0x02 << 3) /*!< Pull-down */
|
||||
#define IOPORT_MODE_PULLUP (0x03 << 3) /*!< Pull-up */
|
||||
#define IOPORT_MODE_WIREDOR (0x04 << 3) /*!< Wired OR */
|
||||
#define IOPORT_MODE_WIREDAND (0x05 << 3) /*!< Wired AND */
|
||||
#define IOPORT_MODE_WIREDORPULL (0x06 << 3) /*!< Wired OR with pull-down */
|
||||
#define IOPORT_MODE_WIREDANDPULL (0x07 << 3) /*!< Wired AND with pull-up */
|
||||
#define IOPORT_MODE_INVERT_PIN (0x01 << 6) /*!< Invert output and input */
|
||||
#define IOPORT_MODE_SLEW_RATE_LIMIT (0x01 << 7) /*!< Slew rate limiting */
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
typedef uint8_t ioport_mode_t;
|
||||
typedef uint8_t ioport_pin_t;
|
||||
typedef uint8_t ioport_port_t;
|
||||
typedef uint8_t ioport_port_mask_t;
|
||||
|
||||
__always_inline static ioport_port_t
|
||||
arch_ioport_pin_to_port_id (ioport_pin_t pin)
|
||||
{
|
||||
return pin >> 3;
|
||||
}
|
||||
|
||||
__always_inline static PORT_t *
|
||||
arch_ioport_port_to_base (ioport_port_t port)
|
||||
{
|
||||
return (PORT_t *) ((uintptr_t) IOPORT_BASE_ADDRESS +
|
||||
(port * IOPORT_PORT_OFFSET));
|
||||
}
|
||||
|
||||
__always_inline static PORT_t *
|
||||
arch_ioport_pin_to_base (ioport_pin_t pin)
|
||||
{
|
||||
return arch_ioport_port_to_base (arch_ioport_pin_to_port_id (pin));
|
||||
}
|
||||
|
||||
__always_inline static ioport_port_mask_t
|
||||
arch_ioport_pin_to_mask (ioport_pin_t pin)
|
||||
{
|
||||
return 1U << (pin & 0x07);
|
||||
}
|
||||
|
||||
__always_inline static ioport_port_mask_t
|
||||
arch_ioport_pin_to_index (ioport_pin_t pin)
|
||||
{
|
||||
return (pin & 0x07);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_init (void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_enable_port (ioport_port_t port, ioport_port_mask_t mask)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
volatile uint8_t *pin_ctrl = &base->PIN0CTRL;
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
for (uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if (mask & arch_ioport_pin_to_mask (i))
|
||||
{
|
||||
pin_ctrl[i] &= ~PORT_ISC_gm;
|
||||
}
|
||||
}
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_enable_pin (ioport_pin_t pin)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
volatile uint8_t *pin_ctrl =
|
||||
(&base->PIN0CTRL + arch_ioport_pin_to_index (pin));
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
*pin_ctrl &= ~PORT_ISC_gm;
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_disable_port (ioport_port_t port, ioport_port_mask_t mask)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
volatile uint8_t *pin_ctrl = &base->PIN0CTRL;
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
for (uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if (mask & arch_ioport_pin_to_mask (i))
|
||||
{
|
||||
pin_ctrl[i] |= PORT_ISC_INPUT_DISABLE_gc;
|
||||
}
|
||||
}
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_disable_pin (ioport_pin_t pin)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
volatile uint8_t *pin_ctrl =
|
||||
(&base->PIN0CTRL + arch_ioport_pin_to_index (pin));
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
*pin_ctrl |= PORT_ISC_INPUT_DISABLE_gc;
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_port_mode (ioport_port_t port,
|
||||
ioport_port_mask_t mask, ioport_mode_t mode)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
|
||||
PORTCFG.MPCMASK = mask;
|
||||
base->PIN0CTRL = mode;
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_pin_mode (ioport_pin_t pin, ioport_mode_t mode)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
|
||||
PORTCFG.MPCMASK = arch_ioport_pin_to_mask (pin);
|
||||
base->PIN0CTRL = mode;
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_port_dir (ioport_port_t port,
|
||||
ioport_port_mask_t mask, enum ioport_direction dir)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
|
||||
if (dir == IOPORT_DIR_OUTPUT)
|
||||
{
|
||||
base->DIRSET = mask;
|
||||
}
|
||||
else if (dir == IOPORT_DIR_INPUT)
|
||||
{
|
||||
base->DIRCLR = mask;
|
||||
}
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_pin_dir (ioport_pin_t pin, enum ioport_direction dir)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
|
||||
if (dir == IOPORT_DIR_OUTPUT)
|
||||
{
|
||||
base->DIRSET = arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
else if (dir == IOPORT_DIR_INPUT)
|
||||
{
|
||||
base->DIRCLR = arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_pin_level (ioport_pin_t pin, bool level)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
|
||||
if (level)
|
||||
{
|
||||
base->OUTSET = arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
base->OUTCLR = arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_port_level (ioport_port_t port,
|
||||
ioport_port_mask_t mask, ioport_port_mask_t level)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
|
||||
base->OUTSET = mask & level;
|
||||
base->OUTCLR = mask & ~level;
|
||||
}
|
||||
|
||||
__always_inline static bool
|
||||
arch_ioport_get_pin_level (ioport_pin_t pin)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
|
||||
return base->IN & arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
|
||||
__always_inline static ioport_port_mask_t
|
||||
arch_ioport_get_port_level (ioport_port_t port, ioport_port_mask_t mask)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
|
||||
return base->IN & mask;
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_toggle_pin_level (ioport_pin_t pin)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
|
||||
base->OUTTGL = arch_ioport_pin_to_mask (pin);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_toggle_port_level (ioport_port_t port, ioport_port_mask_t mask)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
|
||||
base->OUTTGL = mask;
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_pin_sense_mode (ioport_pin_t pin, enum ioport_sense pin_sense)
|
||||
{
|
||||
PORT_t *base = arch_ioport_pin_to_base (pin);
|
||||
volatile uint8_t *pin_ctrl =
|
||||
(&base->PIN0CTRL + arch_ioport_pin_to_index (pin));
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
*pin_ctrl &= ~PORT_ISC_gm;
|
||||
*pin_ctrl |= (pin_sense & PORT_ISC_gm);
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
__always_inline static void
|
||||
arch_ioport_set_port_sense_mode (ioport_port_t port,
|
||||
ioport_port_mask_t mask,
|
||||
enum ioport_sense pin_sense)
|
||||
{
|
||||
PORT_t *base = arch_ioport_port_to_base (port);
|
||||
volatile uint8_t *pin_ctrl = &base->PIN0CTRL;
|
||||
uint8_t new_sense_bits = (pin_sense & PORT_ISC_gm);
|
||||
|
||||
uint8_t flags = cpu_irq_save ();
|
||||
|
||||
for (uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
if (mask & arch_ioport_pin_to_mask (i))
|
||||
{
|
||||
pin_ctrl[i] = (pin_ctrl[i] & ~PORT_ISC_gm) | new_sense_bits;
|
||||
}
|
||||
}
|
||||
|
||||
cpu_irq_restore (flags);
|
||||
}
|
||||
|
||||
#endif /* IOPORT_XMEGA_H */
|
||||
@@ -0,0 +1,71 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief XMEGA legacy IOPORT software compatibility driver interface.
|
||||
*
|
||||
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#include "ioport_compat.h"
|
||||
|
||||
#if defined(IOPORT_XMEGA_COMPAT)
|
||||
void ioport_configure_port_pin(void *port,
|
||||
pin_mask_t pin_mask,
|
||||
port_pin_flags_t flags)
|
||||
{
|
||||
uint8_t pin;
|
||||
|
||||
for (pin = 0; pin < 8; pin++) {
|
||||
if (pin_mask & (1 << pin)) {
|
||||
*((uint8_t *) port + PORT_PIN0CTRL + pin) = flags >> 8;
|
||||
}
|
||||
}
|
||||
/* Select direction and initial pin state */
|
||||
if (flags & IOPORT_DIR_OUTPUT) {
|
||||
if (flags & IOPORT_INIT_HIGH) {
|
||||
*((uint8_t *) port + PORT_OUTSET) = pin_mask;
|
||||
} else {
|
||||
*((uint8_t *) port + PORT_OUTCLR) = pin_mask;
|
||||
}
|
||||
|
||||
*((uint8_t *) port + PORT_DIRSET) = pin_mask;
|
||||
} else {
|
||||
*((uint8_t *) port + PORT_DIRCLR) = pin_mask;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,332 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief XMEGA legacy IOPORT software compatibility driver interface header
|
||||
* file.
|
||||
*
|
||||
* Copyright (c) 2012 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#ifndef IOPORT_XMEGA_COMPAT_H_
|
||||
#define IOPORT_XMEGA_COMPAT_H_
|
||||
|
||||
#include "../ioport.h"
|
||||
|
||||
/**
|
||||
* \brief A pin mask
|
||||
*
|
||||
* This type is used to describe the port pin mask on the part.
|
||||
*/
|
||||
typedef uint8_t pin_mask_t;
|
||||
|
||||
/**
|
||||
* \brief A PORT pin
|
||||
*
|
||||
* This type is used to describe the PORT pins on the part.
|
||||
*/
|
||||
typedef uint8_t port_pin_t;
|
||||
|
||||
/**
|
||||
* \brief Pin configuration flags
|
||||
*
|
||||
* This is a bitmask containing configuration flags for the pins that shall be
|
||||
* configured.
|
||||
*/
|
||||
typedef uint16_t port_pin_flags_t;
|
||||
|
||||
/**
|
||||
* \brief A port id
|
||||
*
|
||||
* This type is used to describe the port id on the part (0 is PORTA).
|
||||
*/
|
||||
typedef uint8_t port_id_t;
|
||||
|
||||
/** \name Initial Output State Flags */
|
||||
/** @{ */
|
||||
#define IOPORT_INIT_LOW (0 << 1) /*!< Initial Output State Low */
|
||||
#define IOPORT_INIT_HIGH (1 << 1) /*!< Initial Output State High */
|
||||
/** @} */
|
||||
|
||||
/** \name Input/Sense Configuration Flags */
|
||||
/** @{ */
|
||||
#define IOPORT_BOTHEDGES (0 << 8) /*!< Sense Both Edges */
|
||||
#define IOPORT_RISING (1 << 8) /*!< Sense Rising Edge */
|
||||
#define IOPORT_FALLING (2 << 8) /*!< Sense Falling Edge */
|
||||
#define IOPORT_LEVEL (3 << 8) /*!< Sense Low Level */
|
||||
#if XMEGA_E
|
||||
# define IOPORT_FORCE_ENABLE (6 << 8) /*!< Sense Force Input Enable Low Level */
|
||||
#endif
|
||||
#define IOPORT_INPUT_DISABLE (7 << 8) /*!< Input Buffer Disabled */
|
||||
/** @} */
|
||||
|
||||
/** \name Output and Pull Configuration Flags */
|
||||
/** @{ */
|
||||
#define IOPORT_TOTEM (0 << 11) /*!< Normal push/pull output */
|
||||
#define IOPORT_BUSKEEPER (1 << 11) /*!< Bus Keeper */
|
||||
#define IOPORT_PULL_DOWN (2 << 11) /*!< Pull-Down (when input) */
|
||||
#define IOPORT_PULL_UP (3 << 11) /*!< Pull-Up (when input) */
|
||||
#define IOPORT_WIRED_OR (4 << 11) /*!< Wired OR */
|
||||
#define IOPORT_WIRED_AND (5 << 11) /*!< Wired AND */
|
||||
#define IOPORT_WIRED_OR_PULL_DOWN (6 << 11) /*!< Wired OR and Pull-Down */
|
||||
#define IOPORT_WIRED_AND_PULL_UP (7 << 11) /*!< Wired AND and Pull-Up */
|
||||
/** @} */
|
||||
|
||||
/** \name Inverted I/O Configuration Flags */
|
||||
/** @{ */
|
||||
#define IOPORT_INV_ENABLED (1 << 14) /*!< I/O is Inverted */
|
||||
#define IOPORT_INV_DISABLE (0 << 14) /*!< I/O is Not Inverted */
|
||||
/** @} */
|
||||
|
||||
/** \name Slew Rate Limit Configuration Flags */
|
||||
/** @{ */
|
||||
#define IOPORT_SRL_ENABLED (1 << 15) /*!< Slew Rate Limit Enabled */
|
||||
#define IOPORT_SRL_DISABLED (0 << 15) /*!< Slew Rate Limit Disabled */
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \name PORT fields structure offset
|
||||
*
|
||||
* These macros are used to compute the field offset number with the PORT_t
|
||||
* structure.
|
||||
*/
|
||||
/** @{ */
|
||||
#define PORT_DIR 0x00 /*!< Data Direction */
|
||||
#define PORT_DIRSET 0x01 /*!< Data Direction Set */
|
||||
#define PORT_DIRCLR 0x02 /*!< Data Direction Clear */
|
||||
#define PORT_DIRTGL 0x03 /*!< Data Direction Toggle */
|
||||
#define PORT_OUT 0x04 /*!< Data Output Value */
|
||||
#define PORT_OUTSET 0x05 /*!< Data Output Value Set */
|
||||
#define PORT_OUTCLR 0x06 /*!< Data Output Value Clear */
|
||||
#define PORT_OUTTGL 0x07 /*!< Data Output Value Toggle */
|
||||
#define PORT_IN 0x08 /*!< Data Input Value */
|
||||
#define PORT_INTCTRL 0x09 /*!< Interrupt Control */
|
||||
#define PORT_INT0MASK 0x0A /*!< Interrupt 0 Mask */
|
||||
#define PORT_INT1MASK 0x0B /*!< Interrupt 1 Mask */
|
||||
#define PORT_INTFLAGS 0x0C /*!< Interrupt Flags */
|
||||
#define PORT_PIN0CTRL 0x10 /*!< Pin 0 Configuration */
|
||||
#define PORT_PIN1CTRL 0x11 /*!< Pin 1 Configuration */
|
||||
#define PORT_PIN2CTRL 0x12 /*!< Pin 2 Configuration */
|
||||
#define PORT_PIN3CTRL 0x13 /*!< Pin 3 Configuration */
|
||||
#define PORT_PIN4CTRL 0x14 /*!< Pin 4 Configuration */
|
||||
#define PORT_PIN5CTRL 0x15 /*!< Pin 5 Configuration */
|
||||
#define PORT_PIN6CTRL 0x16 /*!< Pin 6 Configuration */
|
||||
#define PORT_PIN7CTRL 0x17 /*!< Pin 7 Configuration */
|
||||
/** @} */
|
||||
|
||||
static inline PORT_t *
|
||||
ioport_pin_to_port (port_pin_t pin)
|
||||
{
|
||||
return arch_ioport_pin_to_base (pin);
|
||||
}
|
||||
|
||||
static inline PORT_t *
|
||||
ioport_id_pin_to_port (port_id_t port)
|
||||
{
|
||||
return arch_ioport_port_to_base (port);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configure the IO PORT pin function for a set of pins on a port
|
||||
*
|
||||
* \param port Pointer to the port
|
||||
* \param pin_mask Mask containing the pins that should be configured
|
||||
* \param flags Bitmask of flags specifying additional configuration
|
||||
* parameters.
|
||||
*/
|
||||
void ioport_configure_port_pin (void *port, pin_mask_t pin_mask,
|
||||
port_pin_flags_t flags);
|
||||
|
||||
/**
|
||||
* \brief Select the port function for a single pin
|
||||
*
|
||||
* \param pin The pin to configure
|
||||
* \param flags Bitmask of flags specifying additional configuration
|
||||
* parameters.
|
||||
*/
|
||||
static inline void
|
||||
ioport_configure_pin (port_pin_t pin, port_pin_flags_t flags)
|
||||
{
|
||||
ioport_configure_port_pin (arch_ioport_pin_to_base (pin),
|
||||
arch_ioport_pin_to_mask (pin), flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configure a group of I/O pins on a specified port number
|
||||
*
|
||||
* \param port The port number
|
||||
* \param pin_mask The pin mask to configure
|
||||
* \param flags Bitmask of flags specifying additional configuration
|
||||
* parameters.
|
||||
*/
|
||||
static inline void
|
||||
ioport_configure_group (port_id_t port, pin_mask_t pin_mask,
|
||||
port_pin_flags_t flags)
|
||||
{
|
||||
ioport_configure_port_pin (arch_ioport_port_to_base (port), pin_mask,
|
||||
flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Drive a PORT pin to a given state
|
||||
*
|
||||
* This function will only have an effect if \a pin is configured as
|
||||
* an output.
|
||||
*
|
||||
* \param pin A number identifying the pin to act on.
|
||||
* \param value The desired state of the pin. \a true means drive the
|
||||
* pin high (towards Vdd), while \a false means drive the pin low
|
||||
* (towards Vss).
|
||||
*/
|
||||
static inline void
|
||||
ioport_set_value (port_pin_t pin, bool value)
|
||||
{
|
||||
arch_ioport_set_pin_level (pin, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Drive a PORT pin to a low level
|
||||
*
|
||||
* This function will only have an effect if \a pin is configured as
|
||||
* an output.
|
||||
*
|
||||
* \param pin A number identifying the pin to act on.
|
||||
*/
|
||||
static inline void
|
||||
ioport_set_pin_low (port_pin_t pin)
|
||||
{
|
||||
arch_ioport_set_pin_level (pin, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Drive a PORT pin to a high level
|
||||
*
|
||||
* This function will only have an effect if \a pin is configured as
|
||||
* an output.
|
||||
*
|
||||
* \param pin A number identifying the pin to act on.
|
||||
*/
|
||||
static inline void
|
||||
ioport_set_pin_high (port_pin_t pin)
|
||||
{
|
||||
arch_ioport_set_pin_level (pin, true);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read the current state of a PORT pin
|
||||
*
|
||||
* \param pin A number identifying the pin to read.
|
||||
* \retval true The pin is currently high (close to Vdd)
|
||||
* \retval false The pin is currently low (close to Vss)
|
||||
*/
|
||||
static inline bool
|
||||
ioport_get_value (port_pin_t pin)
|
||||
{
|
||||
return arch_ioport_get_pin_level (pin);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read the current state of a PORT pin and test high level
|
||||
*
|
||||
* \param pin A number identifying the pin to read.
|
||||
* \retval true The pin is currently high (close to Vdd)
|
||||
* \retval false The pin is currently low (close to Vss)
|
||||
*/
|
||||
static inline bool
|
||||
ioport_pin_is_high (port_pin_t pin)
|
||||
{
|
||||
return (arch_ioport_get_pin_level (pin) == true);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read the current state of a PORT pin and test high level
|
||||
*
|
||||
* \param pin A number identifying the pin to read.
|
||||
* \retval true The pin is currently high (close to Vdd)
|
||||
* \retval false The pin is currently low (close to Vss)
|
||||
*/
|
||||
static inline bool
|
||||
ioport_pin_is_low (port_pin_t pin)
|
||||
{
|
||||
return (arch_ioport_get_pin_level (pin) == false);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Toggle the current state of a PORT pin
|
||||
*
|
||||
* \param pin A number identifying the pin to act on.
|
||||
*/
|
||||
static inline void
|
||||
ioport_toggle_pin (port_pin_t pin)
|
||||
{
|
||||
arch_ioport_toggle_pin_level (pin);
|
||||
}
|
||||
|
||||
/*! \brief Drives a group of I/O pin of a port to high level.
|
||||
*
|
||||
* \param port_id The port number.
|
||||
* \param port_mask The mask.
|
||||
*/
|
||||
static inline void
|
||||
ioport_set_group_high (port_id_t port_id, pin_mask_t port_mask)
|
||||
{
|
||||
arch_ioport_set_port_level (port_id, port_mask, port_mask);
|
||||
}
|
||||
|
||||
/*! \brief Drives a group of I/O pin of a port to low level.
|
||||
*
|
||||
* \param port_id The port number.
|
||||
* \param port_mask The mask.
|
||||
*/
|
||||
static inline void
|
||||
ioport_set_group_low (port_id_t port_id, pin_mask_t port_mask)
|
||||
{
|
||||
arch_ioport_set_port_level (port_id, port_mask, 0);
|
||||
}
|
||||
|
||||
/*! \brief Toggles a group of I/O pin of a port.
|
||||
*
|
||||
* \param port_id The port number.
|
||||
* \param port_mask The mask.
|
||||
*/
|
||||
static inline void
|
||||
ioport_tgl_group (port_id_t port_id, pin_mask_t port_mask)
|
||||
{
|
||||
arch_ioport_toggle_port_level (port_id, port_mask);
|
||||
}
|
||||
|
||||
#endif /* IOPORT_COMPAT_H_ */
|
||||
Reference in New Issue
Block a user