Converted timer to Timer0, and enabled global interrupts to make the timer work.

This commit is contained in:
skarg
2007-08-15 19:18:56 +00:00
parent 7e1b95d18f
commit 916843468c
2 changed files with 31 additions and 14 deletions
+4 -2
View File
@@ -42,7 +42,6 @@ void init(void)
/* Initialize I/O ports */ /* Initialize I/O ports */
/* For Port DDRx (Data Direction) Input=1, Output=1 */ /* For Port DDRx (Data Direction) Input=1, Output=1 */
/* For Port PORTx (Bit Value) TriState=0, High=1 */ /* For Port PORTx (Bit Value) TriState=0, High=1 */
DDRB = 0; DDRB = 0;
PORTB = 0; PORTB = 0;
DDRC = 0; DDRC = 0;
@@ -55,11 +54,14 @@ void init(void)
WDTCSR = 0; WDTCSR = 0;
/* Configure USART */ /* Configure USART */
RS485_Set_Baud_Rate(38400);
RS485_Initialize(); RS485_Initialize();
RS485_Set_Baud_Rate(38400);
/* Configure Timer0 for millisecond timer */ /* Configure Timer0 for millisecond timer */
timer_initialize(); timer_initialize();
/* Enable global interrupts */
sei();
} }
void task_milliseconds(void) void task_milliseconds(void)
+27 -12
View File
@@ -25,11 +25,16 @@
#include "hardware.h" #include "hardware.h"
/* This module is a 1 millisecond timer */
/* Prescaling: 1, 8, 64, 256, 1024 */ /* Prescaling: 1, 8, 64, 256, 1024 */
#define TIMER_1_PRESCALER 1 #define TIMER_PRESCALER 64
/* Count: Timer counts up to 0xFFFF and then signals overflow */ /* Count: Timer0 counts up to 0xFF and then signals overflow */
#define TIMER_1_TICKS (FREQ_CPU/TIMER_1_PRESCALER/1000) #define TIMER_TICKS (FREQ_CPU/TIMER_PRESCALER/1000)
#define TIMER_1_COUNT (0xFFFF-TIMER_1_TICKS) #if (TIMER_TICKS > 0xFF)
#error Timer Prescaler value too small
#endif
#define TIMER_COUNT (0xFF-TIMER_TICKS)
/* Global variable millisecond timer - used by main.c for timers task */ /* Global variable millisecond timer - used by main.c for timers task */
volatile uint8_t Timer_Milliseconds = 0; volatile uint8_t Timer_Milliseconds = 0;
@@ -38,24 +43,34 @@ void timer_initialize(void)
{ {
/* Normal Operation */ /* Normal Operation */
TCCR1A = 0; TCCR1A = 0;
/* CS10 = clkI/O/1 (No prescaling) */ /* CSn2 CSn1 CSn0 Description
TCCR1B = _BV(CS10); ---- ---- ---- -----------
0 0 0 No Clock Source
0 0 1 No prescaling
0 1 0 CLKio/8
0 1 1 CLKio/64
1 0 0 CLKio/256
1 0 1 CLKio/1024
1 1 0 Falling Edge of T0 (external)
1 1 1 Rising Edge of T0 (external)
*/
TCCR0B = _BV(CS01) | _BV(CS00);
/* Clear any TOV1 Flag set when the timer overflowed */ /* Clear any TOV1 Flag set when the timer overflowed */
BIT_CLEAR(TIFR1,TOV1); BIT_CLEAR(TIFR0,TOV0);
/* Initial value */ /* Initial value */
TCNT1 = TIMER_1_COUNT; TCNT0 = TIMER_COUNT;
/* Enable the overflow interrupt */ /* Enable the overflow interrupt */
BIT_SET(TIMSK1,TOIE1); BIT_SET(TIMSK0,TOIE0);
/* Clear the Power Reduction Timer/Counter0 */ /* Clear the Power Reduction Timer/Counter0 */
BIT_CLEAR(PRR,PRTIM1); BIT_CLEAR(PRR,PRTIM0);
} }
/* Timer Overflowed! Increment the time. */ /* Timer Overflowed! Increment the time. */
ISR(TIMER1_OVF_vect) ISR(TIMER0_OVF_vect)
{ {
/* Set the counter for the next interrupt */ /* Set the counter for the next interrupt */
TCNT1 = TIMER_1_COUNT; TCNT0 = TIMER_COUNT;
/* Overflow Flag is automatically cleared */ /* Overflow Flag is automatically cleared */
if (Timer_Milliseconds < 0xFF) if (Timer_Milliseconds < 0xFF)
Timer_Milliseconds++; Timer_Milliseconds++;