Fix STM32F10x CMSIS ASM for newer compilers (#137)
Co-authored-by: Steve Karg <skarg@users.sourceforge.net>
This commit is contained in:
@@ -1,26 +1,25 @@
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/**************************************************************************/ /**
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/**
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* @file core_cm3.c
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* @file core_cm3.c
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* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
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* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
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* @version V1.30
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* @version V1.30
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* @date 30. October 2009
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* @date 30. October 2009
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*
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*
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* @note
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* @note
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* Copyright (C) 2009 ARM Limited. All rights reserved.
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* Copyright (C) 2009 ARM Limited. All rights reserved.
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*
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*
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* @par
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* @par
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontrollers. This file can be freely distributed
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* processor based microcontrollers. This file can be freely distributed
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* within development tools that are supporting such ARM based processors.
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* within development tools that are supporting such ARM based processors.
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*
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*
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* @par
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* @par
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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*
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******************************************************************************/
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*/
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#include <stdint.h>
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#include <stdint.h>
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/* define compiler specific symbols */
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/* define compiler specific symbols */
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@@ -689,7 +688,7 @@ uint32_t __STREXB(uint8_t value, uint8_t *addr)
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uint32_t result = 0;
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uint32_t result = 0;
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__ASM volatile("strexb %0, %2, [%1]"
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__ASM volatile("strexb %0, %2, [%1]"
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: "=r"(result)
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: "=&r"(result)
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: "r"(addr), "r"(value));
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: "r"(addr), "r"(value));
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return (result);
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return (result);
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}
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}
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@@ -708,7 +707,7 @@ uint32_t __STREXH(uint16_t value, uint16_t *addr)
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uint32_t result = 0;
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uint32_t result = 0;
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__ASM volatile("strexh %0, %2, [%1]"
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__ASM volatile("strexh %0, %2, [%1]"
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: "=r"(result)
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: "=&r"(result)
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: "r"(addr), "r"(value));
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: "r"(addr), "r"(value));
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return (result);
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return (result);
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}
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}
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