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Fix STM32F10x CMSIS ASM for newer compilers (#137)

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Co-authored-by: Steve Karg <skarg@users.sourceforge.net>
This commit is contained in:
Steve Karg
2020-10-30 12:04:32 -05:00
committed by GitHub
parent 06dde5050c
commit 84bfdb6c9d
1 changed files with 24 additions and 25 deletions
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ports/stm32f10x/CMSIS/core_cm3.c
+4 -5
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@@ -1,4 +1,4 @@
/**************************************************************************/ /** /**
* @file core_cm3.c * @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V1.30 * @version V1.30
@@ -19,8 +19,7 @@
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ */
#include <stdint.h> #include <stdint.h>
/* define compiler specific symbols */ /* define compiler specific symbols */
@@ -689,7 +688,7 @@ uint32_t __STREXB(uint8_t value, uint8_t *addr)
uint32_t result = 0; uint32_t result = 0;
__ASM volatile("strexb %0, %2, [%1]" __ASM volatile("strexb %0, %2, [%1]"
: "=r"(result) : "=&r"(result)
: "r"(addr), "r"(value)); : "r"(addr), "r"(value));
return (result); return (result);
} }
@@ -708,7 +707,7 @@ uint32_t __STREXH(uint16_t value, uint16_t *addr)
uint32_t result = 0; uint32_t result = 0;
__ASM volatile("strexh %0, %2, [%1]" __ASM volatile("strexh %0, %2, [%1]"
: "=r"(result) : "=&r"(result)
: "r"(addr), "r"(value)); : "r"(addr), "r"(value));
return (result); return (result);
} }