Strip tabs and trailing white spaces, and fix end of files (#748)
* format: Strip trailing whitespaces
We want to get rid of trailing whitespaces completly as they make just git
noice. Much better to start using automated tools to get rid of them once and
not getting them back again. This way git history will be cleaner and review
easier.
Commit was generated with:
pre-commit run --all-files trailing-whitespace
* format: Files should have exactly one new line end of them
It is good practice that every file has one new line. It is not now days so
mandatory but it also is not nice if file has lot of newlines end of it. We will
use pre-commit which takes automatically care about this so let's fix all.
Commit was generated with:
pre-commit run --all-files end-of-file-fixer
* format: Convert tabs to spaces
Project mostly use spaces over tabs. When mixing tabs and spaces this usually
makes formatting issues and also when changing those in commits it will make lot
of git noise. We will force spaces most of the time and use pre-commit to fix.
Commit was generated with:
pre-commit run --all-files remove-tabs
---------
Co-authored-by: Kari Argillander <kari.argillander@fidelix.com>
This commit is contained in:
Kari Argillander
@@ -13,4 +13,3 @@ monitor long 0xfffffc30 0x7
|
||||
monitor sleep 100
|
||||
monitor long 0xfffffd08 0xa5000401
|
||||
monitor sleep 100
|
||||
|
||||
|
||||
@@ -200,13 +200,13 @@ target_compile_definitions(${EXECUTABLE} PRIVATE
|
||||
|
||||
target_compile_options(${EXECUTABLE} PRIVATE
|
||||
-Wall -Wextra -pedantic
|
||||
-Wfloat-equal -Wconversion -Wredundant-decls
|
||||
-Wfloat-equal -Wconversion -Wredundant-decls
|
||||
-Wswitch-default
|
||||
# don't warn about conversion, sign, compares, long long and attributes
|
||||
# since they are common in embedded
|
||||
-Wno-sign-conversion
|
||||
-Wno-sign-conversion
|
||||
-Wno-conversion
|
||||
-Wno-sign-compare
|
||||
-Wno-sign-compare
|
||||
-Wno-long-long
|
||||
-Wno-attributes
|
||||
# don't warn about implicit fallthrough since it is common in network protocols
|
||||
@@ -259,7 +259,7 @@ add_custom_target(symbols
|
||||
)
|
||||
|
||||
# calculate the worst case CSTACK memory usage by size and place into a file
|
||||
add_custom_target(cstack
|
||||
add_custom_target(cstack
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||||
DEPENDS ${EXECUTABLE}
|
||||
COMMENT "Print CSTACK memory depth by size"
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||||
COMMAND ${CMAKE_CSTACK} ${EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR} 1> ${PROJECT_NAME}.su
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||||
@@ -269,7 +269,7 @@ add_custom_target(cstack
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||||
)
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||||
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||||
# Print file and library sizes
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||||
add_custom_target(memmap
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||||
add_custom_target(memmap
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||||
DEPENDS ${PROJECT_NAME}.map
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||||
COMMENT "Print file and library memory usage by size"
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COMMAND ${CMAKE_MEMAP} -t GCC_ARM ${PROJECT_NAME}.map
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||||
|
||||
+571
-571
File diff suppressed because it is too large
Load Diff
@@ -2,8 +2,8 @@
|
||||
/* LINKER SCRIPT */
|
||||
/* */
|
||||
/* */
|
||||
/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
|
||||
/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
|
||||
/* The Linker Script defines how the code and data emitted by the GNU C compiler and assembler are */
|
||||
/* to be loaded into memory (code goes into FLASH, variables go into RAM). */
|
||||
/* */
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||||
/* Any symbols defined in the Linker Script are automatically global and available to the rest of the */
|
||||
/* program. */
|
||||
@@ -11,7 +11,7 @@
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||||
/* To force the linker to use this LINKER SCRIPT, just add the -T AT91SAM7S256.LD */
|
||||
/* directive to the linker flags in the makefile. For example, */
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||||
/* */
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||||
/* LFLAGS = -Map main.map -nostartfiles -T AT91SAM7S256.LD */
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||||
/* LFLAGS = -Map main.map -nostartfiles -T AT91SAM7S256.LD */
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||||
/* */
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||||
/* */
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||||
/* The order that the object files are listed in the makefile determines what .text section is */
|
||||
@@ -19,10 +19,10 @@
|
||||
/* */
|
||||
/* For example: $(LD) $(LFLAGS) -o main.out crt.o main.o lowlevelinit.o */
|
||||
/* */
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||||
/* crt.o is first in the list of objects, so it will be placed at address 0x00000000 */
|
||||
/* crt.o is first in the list of objects, so it will be placed at address 0x00000000 */
|
||||
/* */
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/* */
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||||
/* The top of the stack (_stack_end) is (last_byte_of_ram +1) - 4 */
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||||
/* The top of the stack (_stack_end) is (last_byte_of_ram +1) - 4 */
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/* */
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/* Therefore: _stack_end = (0x00020FFFF + 1) - 4 = 0x00210000 - 4 = 0x0020FFFC */
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/* Therefore: _stack_end = (0x000203FFF + 1) - 4 = 0x00204000 - 4 = 0x00203FFC */
|
||||
@@ -57,7 +57,7 @@
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||||
/* . | SVC Stack 16 bytes | */
|
||||
/* . | | */
|
||||
/* . |---------------------------------|0x0020FECC */
|
||||
/* . | | */
|
||||
/* . | | */
|
||||
/* . | stack area for user program | */
|
||||
/* . | | */
|
||||
/* . | | */
|
||||
@@ -110,10 +110,10 @@
|
||||
ENTRY(_vec_reset)
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||||
|
||||
/* specify the AT91SAM7S64 memory areas */
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||||
MEMORY
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||||
MEMORY
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||||
{
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||||
flash : ORIGIN = 0, LENGTH = 64K /* FLASH EPROM */
|
||||
ram : ORIGIN = 0x00200000, LENGTH = 16K /* static RAM area */
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||||
flash : ORIGIN = 0, LENGTH = 64K /* FLASH EPROM */
|
||||
ram : ORIGIN = 0x00200000, LENGTH = 16K /* static RAM area */
|
||||
}
|
||||
|
||||
|
||||
@@ -122,35 +122,34 @@ MEMORY
|
||||
_stack_end = 0x203FFC;
|
||||
|
||||
/* now define the output sections */
|
||||
SECTIONS
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||||
SECTIONS
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||||
{
|
||||
. = 0; /* set location counter to address zero */
|
||||
|
||||
.text : /* collect all sections that should go into FLASH after startup */
|
||||
{
|
||||
*(.text*) /* all .text sections (code) */
|
||||
*(.rodata) /* all .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* all .glue_7 sections (no idea what these are) */
|
||||
*(.glue_7t) /* all .glue_7t sections (no idea what these are) */
|
||||
_etext = .; /* define a global symbol _etext just after the last code byte */
|
||||
} >flash /* put all the above into FLASH */
|
||||
. = 0; /* set location counter to address zero */
|
||||
|
||||
.data : /* collect all initialized .data sections that go into RAM */
|
||||
{
|
||||
_data = .; /* create a global symbol marking the start of the .data section */
|
||||
*(.data*) /* all .data sections */
|
||||
_edata = .; /* define a global symbol marking the end of the .data section */
|
||||
} >ram AT >flash /* put all the above into RAM (but load the LMA initializer copy into FLASH) */
|
||||
.text : /* collect all sections that should go into FLASH after startup */
|
||||
{
|
||||
*(.text*) /* all .text sections (code) */
|
||||
*(.rodata) /* all .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* all .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* all .glue_7 sections (no idea what these are) */
|
||||
*(.glue_7t) /* all .glue_7t sections (no idea what these are) */
|
||||
_etext = .; /* define a global symbol _etext just after the last code byte */
|
||||
} >flash /* put all the above into FLASH */
|
||||
|
||||
.bss : /* collect all uninitialized .bss sections that go into RAM */
|
||||
{
|
||||
_bss_start = .; /* define a global symbol marking the start of the .bss section */
|
||||
*(.bss*) /* all .bss sections */
|
||||
} >ram /* put all the above in RAM (it will be cleared in the startup code */
|
||||
.data : /* collect all initialized .data sections that go into RAM */
|
||||
{
|
||||
_data = .; /* create a global symbol marking the start of the .data section */
|
||||
*(.data*) /* all .data sections */
|
||||
_edata = .; /* define a global symbol marking the end of the .data section */
|
||||
} >ram AT >flash /* put all the above into RAM (but load the LMA initializer copy into FLASH) */
|
||||
|
||||
. = ALIGN(4); /* advance location counter to the next 32-bit boundary */
|
||||
_bss_end = . ; /* define a global symbol marking the end of the .bss section */
|
||||
.bss : /* collect all uninitialized .bss sections that go into RAM */
|
||||
{
|
||||
_bss_start = .; /* define a global symbol marking the start of the .bss section */
|
||||
*(.bss*) /* all .bss sections */
|
||||
} >ram /* put all the above in RAM (it will be cleared in the startup code */
|
||||
|
||||
. = ALIGN(4); /* advance location counter to the next 32-bit boundary */
|
||||
_bss_end = . ; /* define a global symbol marking the end of the .bss section */
|
||||
}
|
||||
_end = .; /* define a global symbol marking the end of application RAM */
|
||||
|
||||
_end = .; /* define a global symbol marking the end of application RAM */
|
||||
|
||||
@@ -78,7 +78,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>OGChipSelectEditMenu</name>
|
||||
<state>AT91SAM7S256 Atmel AT91SAM7S256</state>
|
||||
<state>AT91SAM7S256 Atmel AT91SAM7S256</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenLowLevelInterface</name>
|
||||
@@ -138,7 +138,7 @@
|
||||
</option>
|
||||
<option>
|
||||
<name>GFPUDeviceSlave</name>
|
||||
<state>AT91SAM7S256 Atmel AT91SAM7S256</state>
|
||||
<state>AT91SAM7S256 Atmel AT91SAM7S256</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FPU2</name>
|
||||
|
||||
@@ -6,5 +6,3 @@
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
|
||||
+31
-31
@@ -24,57 +24,57 @@
|
||||
/*----------------------------------------------- */
|
||||
/* The AT91SAM7S2564 embeds a 64-Kbyte SRAM bank, and 256 K-Byte Flash */
|
||||
|
||||
#define INT_SRAM 0x00200000
|
||||
#define INT_SRAM_REMAP 0x00000000
|
||||
#define INT_SRAM 0x00200000
|
||||
#define INT_SRAM_REMAP 0x00000000
|
||||
|
||||
#define INT_FLASH 0x00000000
|
||||
#define INT_FLASH_REMAP 0x01000000
|
||||
#define INT_FLASH 0x00000000
|
||||
#define INT_FLASH_REMAP 0x01000000
|
||||
|
||||
#define FLASH_PAGE_NB 512
|
||||
#define FLASH_PAGE_SIZE 128
|
||||
#define FLASH_PAGE_NB 512
|
||||
#define FLASH_PAGE_SIZE 128
|
||||
|
||||
/*------------------------ */
|
||||
/* Leds Definition */
|
||||
/*------------------------ */
|
||||
#define LED1 (1<<0) /* PA0 */
|
||||
#define LED2 (1<<1) /* PA1 */
|
||||
#define LED3 (1<<2) /* PA2 */
|
||||
#define LED4 (1<<3) /* PA3 */
|
||||
#define NB_LEB 4
|
||||
#define LED_MASK (LED1|LED2|LED3|LED4)
|
||||
#define LED1 (1<<0) /* PA0 */
|
||||
#define LED2 (1<<1) /* PA1 */
|
||||
#define LED3 (1<<2) /* PA2 */
|
||||
#define LED4 (1<<3) /* PA3 */
|
||||
#define NB_LEB 4
|
||||
#define LED_MASK (LED1|LED2|LED3|LED4)
|
||||
|
||||
|
||||
/*---------------------------------- */
|
||||
/* Push Buttons Definition */
|
||||
/*----------------------------------- */
|
||||
#define SW1_MASK (1<<19) /* PA19 */
|
||||
#define SW2_MASK (1<<20) /* PA20 */
|
||||
#define SW3_MASK (1<<15) /* PA15 */
|
||||
#define SW4_MASK (1<<14) /* PA14 */
|
||||
#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)
|
||||
#define SW1_MASK (1<<19) /* PA19 */
|
||||
#define SW2_MASK (1<<20) /* PA20 */
|
||||
#define SW3_MASK (1<<15) /* PA15 */
|
||||
#define SW4_MASK (1<<14) /* PA14 */
|
||||
#define SW_MASK (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)
|
||||
|
||||
#define SW1 (1<<19) /* PA19 */
|
||||
#define SW2 (1<<20) /* PA20 */
|
||||
#define SW3 (1<<15) /* PA15 */
|
||||
#define SW4 (1<<14) /* PA14 */
|
||||
#define SW1 (1<<19) /* PA19 */
|
||||
#define SW2 (1<<20) /* PA20 */
|
||||
#define SW3 (1<<15) /* PA15 */
|
||||
#define SW4 (1<<14) /* PA14 */
|
||||
|
||||
/*------------------------- */
|
||||
/* USART Definition */
|
||||
/*------------------------- */
|
||||
/* SUB-D 9 points J3 DBGU */
|
||||
#define DBGU_RXD AT91C_PA9_DRXD /* JP11 must be close */
|
||||
#define DBGU_TXD AT91C_PA10_DTXD /* JP12 must be close */
|
||||
#define AT91C_DBGU_BAUD 115200 /* Baud rate */
|
||||
#define US_RXD_PIN AT91C_PA5_RXD0 /* JP9 must be close */
|
||||
#define US_TXD_PIN AT91C_PA6_TXD0 /* JP7 must be close */
|
||||
#define US_RTS_PIN AT91C_PA7_RTS0 /* JP8 must be close */
|
||||
#define US_CTS_PIN AT91C_PA8_CTS0 /* JP6 must be close */
|
||||
#define DBGU_RXD AT91C_PA9_DRXD /* JP11 must be close */
|
||||
#define DBGU_TXD AT91C_PA10_DTXD /* JP12 must be close */
|
||||
#define AT91C_DBGU_BAUD 115200 /* Baud rate */
|
||||
#define US_RXD_PIN AT91C_PA5_RXD0 /* JP9 must be close */
|
||||
#define US_TXD_PIN AT91C_PA6_TXD0 /* JP7 must be close */
|
||||
#define US_RTS_PIN AT91C_PA7_RTS0 /* JP8 must be close */
|
||||
#define US_CTS_PIN AT91C_PA8_CTS0 /* JP6 must be close */
|
||||
|
||||
/*-------------- */
|
||||
/* Master Clock */
|
||||
/*-------------- */
|
||||
#define EXT_OC 18432000 /* Exetrnal ocilator MAINCK */
|
||||
#define MCK 47923200 /* MCK (PLLRC div by 2) */
|
||||
#define MCKKHz (MCK/1000) /* */
|
||||
#define EXT_OC 18432000 /* Exetrnal ocilator MAINCK */
|
||||
#define MCK 47923200 /* MCK (PLLRC div by 2) */
|
||||
#define MCKKHz (MCK/1000) /* */
|
||||
|
||||
#endif /* Board_h */
|
||||
|
||||
+179
-179
@@ -1,40 +1,40 @@
|
||||
/* ****************************************************************************************************** */
|
||||
/* crt.s */
|
||||
/* crt.s */
|
||||
/* */
|
||||
/* Assembly Language Startup Code for Atmel AT91SAM7S256 */
|
||||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* Author: James P Lynch May 12, 2007 */
|
||||
/* ****************************************************************************************************** */
|
||||
|
||||
/* Stack Sizes */
|
||||
.set UND_STACK_SIZE, 0x00000010 /* stack for "undefined instruction" interrupts is 16 bytes */
|
||||
.set ABT_STACK_SIZE, 0x00000010 /* stack for "abort" interrupts is 16 bytes */
|
||||
.set FIQ_STACK_SIZE, 0x00000080 /* stack for "FIQ" interrupts is 128 bytes */
|
||||
.set IRQ_STACK_SIZE, 0X00000080 /* stack for "IRQ" normal interrupts is 128 bytes */
|
||||
.set SVC_STACK_SIZE, 0x00000080 /* stack for "SVC" supervisor mode is 128 bytes */
|
||||
.set UND_STACK_SIZE, 0x00000010 /* stack for "undefined instruction" interrupts is 16 bytes */
|
||||
.set ABT_STACK_SIZE, 0x00000010 /* stack for "abort" interrupts is 16 bytes */
|
||||
.set FIQ_STACK_SIZE, 0x00000080 /* stack for "FIQ" interrupts is 128 bytes */
|
||||
.set IRQ_STACK_SIZE, 0X00000080 /* stack for "IRQ" normal interrupts is 128 bytes */
|
||||
.set SVC_STACK_SIZE, 0x00000080 /* stack for "SVC" supervisor mode is 128 bytes */
|
||||
|
||||
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
|
||||
.set ARM_MODE_USR, 0x10 /* Normal User Mode */
|
||||
.set ARM_MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
|
||||
.set ARM_MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
|
||||
.set ARM_MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
|
||||
.set ARM_MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
|
||||
.set ARM_MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
|
||||
.set ARM_MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
|
||||
.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
|
||||
.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
|
||||
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
|
||||
.set ARM_MODE_USR, 0x10 /* Normal User Mode */
|
||||
.set ARM_MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
|
||||
.set ARM_MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
|
||||
.set ARM_MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
|
||||
.set ARM_MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
|
||||
.set ARM_MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
|
||||
.set ARM_MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
|
||||
.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
|
||||
.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
|
||||
|
||||
/* Addresses and offsets of AIC and PIO */
|
||||
.set AT91C_BASE_AIC, 0xFFFFF000 /* (AIC) Base Address */
|
||||
.set AT91C_PIOA_CODR, 0xFFFFF434 /* (PIO) Clear Output Data Register */
|
||||
.set AT91C_AIC_IVR, 0xFFFFF100 /* (AIC) IRQ Interrupt Vector Register */
|
||||
.set AT91C_AIC_FVR, 0xFFFFF104 /* (AIC) FIQ Interrupt Vector Register */
|
||||
.set AIC_IVR, 256 /* IRQ Vector Register offset from base above */
|
||||
.set AIC_FVR, 260 /* FIQ Vector Register offset from base above */
|
||||
.set AIC_EOICR, 304 /* End of Interrupt Command Register */
|
||||
.set AT91C_BASE_AIC, 0xFFFFF000 /* (AIC) Base Address */
|
||||
.set AT91C_PIOA_CODR, 0xFFFFF434 /* (PIO) Clear Output Data Register */
|
||||
.set AT91C_AIC_IVR, 0xFFFFF100 /* (AIC) IRQ Interrupt Vector Register */
|
||||
.set AT91C_AIC_FVR, 0xFFFFF104 /* (AIC) FIQ Interrupt Vector Register */
|
||||
.set AIC_IVR, 256 /* IRQ Vector Register offset from base above */
|
||||
.set AIC_FVR, 260 /* FIQ Vector Register offset from base above */
|
||||
.set AIC_EOICR, 304 /* End of Interrupt Command Register */
|
||||
|
||||
/* identify all GLOBAL symbols */
|
||||
.global _vec_reset
|
||||
@@ -46,165 +46,165 @@
|
||||
.global _vec_irq
|
||||
.global _vec_fiq
|
||||
.global AT91F_Irq_Handler
|
||||
.global AT91F_Fiq_Handler
|
||||
.global AT91F_Default_FIQ_handler
|
||||
.global AT91F_Default_IRQ_handler
|
||||
.global AT91F_Spurious_handler
|
||||
.global AT91F_Dabt_Handler
|
||||
.global AT91F_Pabt_Handler
|
||||
.global AT91F_Undef_Handler
|
||||
.global AT91F_Fiq_Handler
|
||||
.global AT91F_Default_FIQ_handler
|
||||
.global AT91F_Default_IRQ_handler
|
||||
.global AT91F_Spurious_handler
|
||||
.global AT91F_Dabt_Handler
|
||||
.global AT91F_Pabt_Handler
|
||||
.global AT91F_Undef_Handler
|
||||
|
||||
|
||||
/* GNU assembler controls */
|
||||
.text /* all assembler code that follows will go into .text section */
|
||||
.arm /* compile for 32-bit ARM instruction set */
|
||||
.align /* align section on 32-bit boundary */
|
||||
.text /* all assembler code that follows will go into .text section */
|
||||
.arm /* compile for 32-bit ARM instruction set */
|
||||
.align /* align section on 32-bit boundary */
|
||||
|
||||
/* ============================================================ */
|
||||
/* VECTOR TABLE */
|
||||
/* */
|
||||
/* Must be located in FLASH at address 0x00000000 */
|
||||
/* */
|
||||
/* Easy to do if this file crt.s is first in the list */
|
||||
/* for the linker step in the makefile, e.g. */
|
||||
/* */
|
||||
/* $(LD) $(LFLAGS) -o main.out crt.o main.o */
|
||||
/* */
|
||||
/* VECTOR TABLE */
|
||||
/* */
|
||||
/* Must be located in FLASH at address 0x00000000 */
|
||||
/* */
|
||||
/* Easy to do if this file crt.s is first in the list */
|
||||
/* for the linker step in the makefile, e.g. */
|
||||
/* */
|
||||
/* $(LD) $(LFLAGS) -o main.out crt.o main.o */
|
||||
/* */
|
||||
/* ============================================================ */
|
||||
|
||||
_vec_reset: b _init_reset /* RESET vector - must be at 0x00000000 */
|
||||
_vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
|
||||
_vec_swi: b _vec_swi /* Software Interrupt vector */
|
||||
_vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
|
||||
_vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
|
||||
_vec_rsv: nop /* Reserved vector */
|
||||
_vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
|
||||
_vec_fiq: /* Fast interrupt request (FIQ) vector */
|
||||
_vec_reset: b _init_reset /* RESET vector - must be at 0x00000000 */
|
||||
_vec_undef: b AT91F_Undef_Handler /* Undefined Instruction vector */
|
||||
_vec_swi: b _vec_swi /* Software Interrupt vector */
|
||||
_vec_pabt: b AT91F_Pabt_Handler /* Prefetch abort vector */
|
||||
_vec_dabt: b AT91F_Dabt_Handler /* Data abort vector */
|
||||
_vec_rsv: nop /* Reserved vector */
|
||||
_vec_irq: b AT91F_Irq_Handler /* Interrupt Request (IRQ) vector */
|
||||
_vec_fiq: /* Fast interrupt request (FIQ) vector */
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Function: AT91F_Fiq_Handler */
|
||||
/* */
|
||||
/* Function: AT91F_Fiq_Handler */
|
||||
/* */
|
||||
/* The FIQ interrupt asserts when switch SW1 is pressed. */
|
||||
/* */
|
||||
/* */
|
||||
/* This simple FIQ handler turns on LED3 (Port PA2). The LED3 will be */
|
||||
/* turned off by the background loop in main() thus giving a visual */
|
||||
/* indication that the interrupt has occurred. */
|
||||
/* */
|
||||
/* This FIQ_Handler supports non-nested FIQ interrupts (a FIQ interrupt */
|
||||
/* cannot itself be interrupted). */
|
||||
/* */
|
||||
/* */
|
||||
/* This FIQ_Handler supports non-nested FIQ interrupts (a FIQ interrupt */
|
||||
/* cannot itself be interrupted). */
|
||||
/* */
|
||||
/* The Fast Interrupt Vector Register (AIC_FVR) is read to clear the */
|
||||
/* interrupt. */
|
||||
/* */
|
||||
/* A global variable FiqCount is also incremented. */
|
||||
/* */
|
||||
/* Remember that switch SW1 is not debounced, so the FIQ interrupt may */
|
||||
/* interrupt. */
|
||||
/* */
|
||||
/* A global variable FiqCount is also incremented. */
|
||||
/* */
|
||||
/* Remember that switch SW1 is not debounced, so the FIQ interrupt may */
|
||||
/* occur more than once for a single button push. */
|
||||
/* */
|
||||
/* Programmer: James P Lynch */
|
||||
/* */
|
||||
/* Programmer: James P Lynch */
|
||||
/* ======================================================================== */
|
||||
AT91F_Fiq_Handler:
|
||||
|
||||
/* Adjust LR_irq */
|
||||
sub lr, lr, #4
|
||||
sub lr, lr, #4
|
||||
|
||||
/* Read the AIC Fast Interrupt Vector register to clear the interrupt */
|
||||
ldr r12, =AT91C_AIC_FVR
|
||||
ldr r11, [r12]
|
||||
ldr r12, =AT91C_AIC_FVR
|
||||
ldr r11, [r12]
|
||||
|
||||
/* Return from Fiq interrupt */
|
||||
movs pc, lr
|
||||
movs pc, lr
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* _init_reset Handler */
|
||||
/* */
|
||||
/* RESET vector 0x00000000 branches to here. */
|
||||
/* */
|
||||
/* ARM microprocessor begins execution after RESET at address 0x00000000 */
|
||||
/* in Supervisor mode with interrupts disabled! */
|
||||
/* */
|
||||
/* _init_reset handler: creates a stack for each ARM mode. */
|
||||
/* sets up a stack pointer for each ARM mode. */
|
||||
/* turns off interrupts in each mode. */
|
||||
/* leaves CPU in SYS (System) mode. */
|
||||
/* */
|
||||
/* block copies the initializers to .data section */
|
||||
/* clears the .bss section to zero */
|
||||
/* */
|
||||
/* branches to main( ) */
|
||||
/* _init_reset Handler */
|
||||
/* */
|
||||
/* RESET vector 0x00000000 branches to here. */
|
||||
/* */
|
||||
/* ARM microprocessor begins execution after RESET at address 0x00000000 */
|
||||
/* in Supervisor mode with interrupts disabled! */
|
||||
/* */
|
||||
/* _init_reset handler: creates a stack for each ARM mode. */
|
||||
/* sets up a stack pointer for each ARM mode. */
|
||||
/* turns off interrupts in each mode. */
|
||||
/* leaves CPU in SYS (System) mode. */
|
||||
/* */
|
||||
/* block copies the initializers to .data section */
|
||||
/* clears the .bss section to zero */
|
||||
/* */
|
||||
/* branches to main( ) */
|
||||
/* ======================================================================== */
|
||||
.text /* all assembler code that follows will go into .text section */
|
||||
.align /* align section on 32-bit boundary */
|
||||
.text /* all assembler code that follows will go into .text section */
|
||||
.align /* align section on 32-bit boundary */
|
||||
_init_reset:
|
||||
/* Setup a stack for each mode with interrupts initially disabled. */
|
||||
ldr r0, =_stack_end /* r0 = top-of-stack */
|
||||
/* Setup a stack for each mode with interrupts initially disabled. */
|
||||
ldr r0, =_stack_end /* r0 = top-of-stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_UND|I_BIT|F_BIT /* switch to Undefined Instruction Mode */
|
||||
mov sp, r0 /* set stack pointer for UND mode */
|
||||
sub r0, r0, #UND_STACK_SIZE /* adjust r0 past UND stack */
|
||||
msr CPSR_c, #ARM_MODE_UND|I_BIT|F_BIT /* switch to Undefined Instruction Mode */
|
||||
mov sp, r0 /* set stack pointer for UND mode */
|
||||
sub r0, r0, #UND_STACK_SIZE /* adjust r0 past UND stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_ABT|I_BIT|F_BIT /* switch to Abort Mode */
|
||||
mov sp, r0 /* set stack pointer for ABT mode */
|
||||
sub r0, r0, #ABT_STACK_SIZE /* adjust r0 past ABT stack */
|
||||
msr CPSR_c, #ARM_MODE_ABT|I_BIT|F_BIT /* switch to Abort Mode */
|
||||
mov sp, r0 /* set stack pointer for ABT mode */
|
||||
sub r0, r0, #ABT_STACK_SIZE /* adjust r0 past ABT stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_FIQ|I_BIT|F_BIT /* switch to FIQ Mode */
|
||||
mov sp, r0 /* set stack pointer for FIQ mode */
|
||||
sub r0, r0, #FIQ_STACK_SIZE /* adjust r0 past FIQ stack */
|
||||
msr CPSR_c, #ARM_MODE_FIQ|I_BIT|F_BIT /* switch to FIQ Mode */
|
||||
mov sp, r0 /* set stack pointer for FIQ mode */
|
||||
sub r0, r0, #FIQ_STACK_SIZE /* adjust r0 past FIQ stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_IRQ|I_BIT|F_BIT /* switch to IRQ Mode */
|
||||
mov sp, r0 /* set stack pointer for IRQ mode */
|
||||
sub r0, r0, #IRQ_STACK_SIZE /* adjust r0 past IRQ stack */
|
||||
msr CPSR_c, #ARM_MODE_IRQ|I_BIT|F_BIT /* switch to IRQ Mode */
|
||||
mov sp, r0 /* set stack pointer for IRQ mode */
|
||||
sub r0, r0, #IRQ_STACK_SIZE /* adjust r0 past IRQ stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_SVC|I_BIT|F_BIT /* switch to Supervisor Mode */
|
||||
mov sp, r0 /* set stack pointer for SVC mode */
|
||||
sub r0, r0, #SVC_STACK_SIZE /* adjust r0 past SVC stack */
|
||||
msr CPSR_c, #ARM_MODE_SVC|I_BIT|F_BIT /* switch to Supervisor Mode */
|
||||
mov sp, r0 /* set stack pointer for SVC mode */
|
||||
sub r0, r0, #SVC_STACK_SIZE /* adjust r0 past SVC stack */
|
||||
|
||||
msr CPSR_c, #ARM_MODE_SYS|I_BIT|F_BIT /* switch to System Mode */
|
||||
mov sp, r0 /* set stack pointer for SYS mode */
|
||||
/* we now start execution in SYSTEM mode */
|
||||
/* This is exactly like USER mode (same stack) */
|
||||
/* but SYSTEM mode has more privileges */
|
||||
msr CPSR_c, #ARM_MODE_SYS|I_BIT|F_BIT /* switch to System Mode */
|
||||
mov sp, r0 /* set stack pointer for SYS mode */
|
||||
/* we now start execution in SYSTEM mode */
|
||||
/* This is exactly like USER mode (same stack) */
|
||||
/* but SYSTEM mode has more privileges */
|
||||
|
||||
/* copy initialized variables .data section (Copy from ROM to RAM) */
|
||||
/* copy initialized variables .data section (Copy from ROM to RAM) */
|
||||
ldr R1, =_etext
|
||||
ldr R2, =_data
|
||||
ldr R3, =_edata
|
||||
1: cmp R2, R3
|
||||
1: cmp R2, R3
|
||||
ldrlo R0, [R1], #4
|
||||
strlo R0, [R2], #4
|
||||
blo 1b
|
||||
|
||||
/* Clear uninitialized variables .bss section (Zero init) */
|
||||
/* Clear uninitialized variables .bss section (Zero init) */
|
||||
mov R0, #0
|
||||
ldr R1, =_bss_start
|
||||
ldr R2, =_bss_end
|
||||
2: cmp R1, R2
|
||||
2: cmp R1, R2
|
||||
strlo R0, [R1], #4
|
||||
blo 2b
|
||||
|
||||
/* Enter the C code */
|
||||
/* Enter the C code */
|
||||
b main
|
||||
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Function: AT91F_Irq_Handler */
|
||||
/* */
|
||||
/* This IRQ_Handler supports nested interrupts (an IRQ interrupt can itself */
|
||||
/* be interrupted). */
|
||||
/* */
|
||||
/* Function: AT91F_Irq_Handler */
|
||||
/* */
|
||||
/* This IRQ_Handler supports nested interrupts (an IRQ interrupt can itself */
|
||||
/* be interrupted). */
|
||||
/* */
|
||||
/* This handler re-enables interrupts and switches to "Supervisor" mode to */
|
||||
/* prevent any corruption to the link and IP registers. */
|
||||
/* */
|
||||
/* prevent any corruption to the link and IP registers. */
|
||||
/* */
|
||||
/* The Interrupt Vector Register (AIC_IVR) is read to determine the address */
|
||||
/* of the required interrupt service routine. The ISR routine can be a */
|
||||
/* standard C function since this handler minds all the save/restore */
|
||||
/* protocols. */
|
||||
/* */
|
||||
/* */
|
||||
/* Programmers: */
|
||||
/* of the required interrupt service routine. The ISR routine can be a */
|
||||
/* standard C function since this handler minds all the save/restore */
|
||||
/* protocols. */
|
||||
/* */
|
||||
/* */
|
||||
/* Programmers: */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* ATMEL Microcontroller Software Support - ROUSSET - */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
@@ -223,97 +223,97 @@ _init_reset:
|
||||
/* Object : Generic CStartup to AT91SAM7S256 */
|
||||
/* 1.0 09/May/06 JPP : Creation */
|
||||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* Note: taken from Atmel web site (www.at91.com) */
|
||||
/* Keil example project: AT91SAM7S-Interrupt_SAM7S */
|
||||
/* Keil example project: AT91SAM7S-Interrupt_SAM7S */
|
||||
/* ======================================================================== */
|
||||
AT91F_Irq_Handler:
|
||||
|
||||
/* Manage Exception Entry */
|
||||
/* Manage Exception Entry */
|
||||
/* Adjust and save LR_irq in IRQ stack */
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {lr}
|
||||
sub lr, lr, #4
|
||||
stmfd sp!, {lr}
|
||||
|
||||
/* Save r0 and SPSR (need to be saved for nested interrupt) */
|
||||
mrs r14, SPSR
|
||||
stmfd sp!, {r0,r14}
|
||||
mrs r14, SPSR
|
||||
stmfd sp!, {r0,r14}
|
||||
|
||||
/* Write in the IVR to support Protect Mode */
|
||||
/* No effect in Normal Mode */
|
||||
/* Write in the IVR to support Protect Mode */
|
||||
/* No effect in Normal Mode */
|
||||
/* De-assert the NIRQ and clear the source in Protect Mode */
|
||||
ldr r14, =AT91C_BASE_AIC
|
||||
ldr r0 , [r14, #AIC_IVR]
|
||||
str r14, [r14, #AIC_IVR]
|
||||
ldr r14, =AT91C_BASE_AIC
|
||||
ldr r0 , [r14, #AIC_IVR]
|
||||
str r14, [r14, #AIC_IVR]
|
||||
|
||||
/* Enable Interrupt and Switch in Supervisor Mode */
|
||||
msr CPSR_c, #ARM_MODE_SVC
|
||||
msr CPSR_c, #ARM_MODE_SVC
|
||||
|
||||
/* Save scratch/used registers and LR in User Stack */
|
||||
stmfd sp!, { r1-r3, r12, r14}
|
||||
stmfd sp!, { r1-r3, r12, r14}
|
||||
|
||||
/* Branch to the routine pointed by the AIC_IVR */
|
||||
mov r14, pc
|
||||
bx r0
|
||||
mov r14, pc
|
||||
bx r0
|
||||
|
||||
/* Manage Exception Exit */
|
||||
/* Manage Exception Exit */
|
||||
/* Restore scratch/used registers and LR from User Stack */
|
||||
ldmia sp!, { r1-r3, r12, r14}
|
||||
ldmia sp!, { r1-r3, r12, r14}
|
||||
|
||||
/* Disable Interrupt and switch back in IRQ mode */
|
||||
msr CPSR_c, #I_BIT | ARM_MODE_IRQ
|
||||
msr CPSR_c, #I_BIT | ARM_MODE_IRQ
|
||||
|
||||
/* Mark the End of Interrupt on the AIC */
|
||||
ldr r14, =AT91C_BASE_AIC
|
||||
str r14, [r14, #AIC_EOICR]
|
||||
ldr r14, =AT91C_BASE_AIC
|
||||
str r14, [r14, #AIC_EOICR]
|
||||
|
||||
/* Restore SPSR_irq and r0 from IRQ stack */
|
||||
ldmia sp!, {r0,r14}
|
||||
msr SPSR_cxsf, r14
|
||||
ldmia sp!, {r0,r14}
|
||||
msr SPSR_cxsf, r14
|
||||
|
||||
/* Restore adjusted LR_irq from IRQ stack directly in the PC */
|
||||
ldmia sp!, {pc}^
|
||||
ldmia sp!, {pc}^
|
||||
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Function: AT91F_Dabt_Handler */
|
||||
/* */
|
||||
/* Entered on Data Abort exception. */
|
||||
/* Enters blink routine (3 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* Function: AT91F_Dabt_Handler */
|
||||
/* */
|
||||
/* Entered on Data Abort exception. */
|
||||
/* Enters blink routine (3 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* ======================================================================== */
|
||||
AT91F_Dabt_Handler: mov R0, #3
|
||||
b blinker
|
||||
AT91F_Dabt_Handler: mov R0, #3
|
||||
b blinker
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Function: AT91F_Pabt_Handler */
|
||||
/* */
|
||||
/* Entered on Prefetch Abort exception. */
|
||||
/* Enters blink routine (2 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* Function: AT91F_Pabt_Handler */
|
||||
/* */
|
||||
/* Entered on Prefetch Abort exception. */
|
||||
/* Enters blink routine (2 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* ======================================================================== */
|
||||
AT91F_Pabt_Handler: mov R0, #2
|
||||
b blinker
|
||||
AT91F_Pabt_Handler: mov R0, #2
|
||||
b blinker
|
||||
|
||||
|
||||
/* ======================================================================== */
|
||||
/* Function: AT91F_Undef_Handler */
|
||||
/* */
|
||||
/* Entered on Undefined Instruction exception. */
|
||||
/* Enters blink routine (1 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* Function: AT91F_Undef_Handler */
|
||||
/* */
|
||||
/* Entered on Undefined Instruction exception. */
|
||||
/* Enters blink routine (1 blinks followed by a pause) */
|
||||
/* processor hangs in the blink loop forever */
|
||||
/* */
|
||||
/* ======================================================================== */
|
||||
AT91F_Undef_Handler: mov R0, #1
|
||||
b blinker
|
||||
AT91F_Undef_Handler: mov R0, #1
|
||||
b blinker
|
||||
|
||||
|
||||
AT91F_Default_FIQ_handler: b AT91F_Default_FIQ_handler
|
||||
AT91F_Default_FIQ_handler: b AT91F_Default_FIQ_handler
|
||||
|
||||
AT91F_Default_IRQ_handler: b AT91F_Default_IRQ_handler
|
||||
AT91F_Default_IRQ_handler: b AT91F_Default_IRQ_handler
|
||||
|
||||
AT91F_Spurious_handler: b AT91F_Spurious_handler
|
||||
AT91F_Spurious_handler: b AT91F_Spurious_handler
|
||||
.end
|
||||
|
||||
@@ -50,7 +50,7 @@ struct object_data Object_List[BACNET_NETWORK_PORTS_MAX];
|
||||
#define BACNET_NETWORK_PORT_INSTANCE 1
|
||||
#endif
|
||||
|
||||
/* BACnetARRAY of REAL, is an array of the link speeds
|
||||
/* BACnetARRAY of REAL, is an array of the link speeds
|
||||
supported by this network port */
|
||||
static uint32_t Link_Speeds[] = {9600, 19200, 38400, 57600, 76800, 115200 };
|
||||
|
||||
@@ -372,8 +372,8 @@ static int Network_Port_Link_Speeds_Encode(
|
||||
|
||||
/**
|
||||
* @brief Set the device link speed (baud rate)
|
||||
* @param object_instance The object instance number of the object
|
||||
* @param value The new link speed value
|
||||
* @param object_instance The object instance number of the object
|
||||
* @param value The new link speed value
|
||||
* @return true if value was set
|
||||
*/
|
||||
bool Network_Port_Link_Speed_Set(uint32_t object_instance, float value)
|
||||
|
||||
+10
-10
@@ -1,10 +1,10 @@
|
||||
This port was done with a AT91SAM7S-EK which contained a
|
||||
AT91SAM7S64 processor. The compiler was the GNU ARM compiler
|
||||
and tools from Yagarto project.
|
||||
and tools from Yagarto project.
|
||||
|
||||
The hardware was modified by severing the I-PA5 (RXD0),
|
||||
I-PA6 (TXD0), I-PA7 (RTS0) pads and rerouting those
|
||||
signals to a DS75176 RS-485 transceiver.
|
||||
The hardware was modified by severing the I-PA5 (RXD0),
|
||||
I-PA6 (TXD0), I-PA7 (RTS0) pads and rerouting those
|
||||
signals to a DS75176 RS-485 transceiver.
|
||||
PIN SIGNAL AT91SAM7S
|
||||
--- ------ ---------
|
||||
1 RO RXD0
|
||||
@@ -20,18 +20,18 @@ The makefile allows you to build just the dlmstp or a simple
|
||||
server, both for programming into the flash memory of the processor.
|
||||
The dlmstp is the datalink layer for MS/TP over RS-485.
|
||||
|
||||
I used the makefile from the command line on Windows, and
|
||||
then used the SAM-BA to send the resulting .bin file to the
|
||||
board using a J-Link. To debug the code from flash, run the
|
||||
I used the makefile from the command line on Windows, and
|
||||
then used the SAM-BA to send the resulting .bin file to the
|
||||
board using a J-Link. To debug the code from flash, run the
|
||||
J-Link GDB Server and then:
|
||||
> arm-elf-gdb bacnet.elf
|
||||
|
||||
I got the crt.s, at91sam7s256.ld, blinker.c, init.c, isr.c, and
|
||||
timer.c from James P Lynch. I created the rs485.c based on the
|
||||
initialization sequence from serial.c by Keil Electronik. I
|
||||
timer.c from James P Lynch. I created the rs485.c based on the
|
||||
initialization sequence from serial.c by Keil Electronik. I
|
||||
got the at91sam7s256.h file from Atmel via the Keil website.
|
||||
I started with the makefile from James P Lynch, but it didn't work
|
||||
for me. I then used some ideas from FreeRTOS makefile, and
|
||||
for me. I then used some ideas from FreeRTOS makefile, and
|
||||
created my own makefile from scratch.
|
||||
|
||||
Hopefully you find it useful!
|
||||
|
||||
Reference in New Issue
Block a user