Cleaned up tabs and file width some.

bacnet-stack/ports/at91sam7s/init.c

@@ -96,7 +96,6 @@ void LowLevelInit(void)
         AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler;
     }
     AT91C_BASE_AIC->AIC_SPU  = (int) AT91F_Spurious_handler;
-
 }
 
 

bacnet-stack/ports/at91sam7s/main.c

@@ -1,6 +1,7 @@
 /**************************************************************************
 *
 * Copyright (C) 2007 Steve Karg <skarg@users.sourceforge.net>
+* Portions of the AT91SAM7S startup code were developed by James P Lynch.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
@@ -38,7 +39,7 @@
 #include "handlers.h"
 
 //  *******************************************************
-//   FIXME: put in header files         External References
+//   FIXME: use header files?     External References
 //  *******************************************************
 extern    void LowLevelInit(void);
 extern    unsigned enableIRQ(void);
@@ -48,7 +49,7 @@ extern	void TimerInit(void);
 extern volatile unsigned long Timer_Milliseconds;
 
 //  *******************************************************
-//               Global Variables - ???
+//  FIXME: use header files?      Global Variables
 //  *******************************************************
 unsigned int FiqCount = 0;
 
@@ -79,13 +80,14 @@ void millisecond_timer(void)
 }
 
 int    main (void) {
-    unsigned long	IdleCount = 0;						// idle loop blink counter (2x)
+    unsigned long    IdleCount = 0; // idle loop blink counter
     bool LED3_Off_Enabled = true;
     uint16_t pdu_len = 0;
     BACNET_ADDRESS src; /* source address */
     uint8_t pdu[MAX_MPDU]; /* PDU data */
 
-    // Initialize the Atmel AT91SAM7S256 (watchdog, PLL clock, default interrupts, etc.)
+    // Initialize the Atmel AT91SAM7S256
+    // (watchdog, PLL clock, default interrupts, etc.)
     LowLevelInit();
     TimerInit();
     /* Initialize the Parallel I/O Controller A Peripheral Clock */
@@ -93,22 +95,38 @@ int	main (void) {
     pPMC->PMC_PCER = pPMC->PMC_PCSR | (1<<AT91C_ID_PIOA);
 
     // Set up the LEDs (PA0 - PA3)
-    volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA;			// pointer to PIO data structure
+    volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA;
-    pPIO->PIO_PER = LED_MASK | SW1_MASK;				// PIO Enable Register - allow PIO to control pins P0 - P3 and pin 19
+    // PIO Enable Register
-    pPIO->PIO_OER = LED_MASK;							// PIO Output Enable Register - sets pins P0 - P3 to outputs
+    // allow PIO to control pins P0 - P3 and pin 19
-    pPIO->PIO_SODR = LED_MASK;							// PIO Set Output Data Register - turns off the four LEDs
+    pPIO->PIO_PER = LED_MASK | SW1_MASK;
+    // PIO Output Enable Register
+    // sets pins P0 - P3 to outputs
+    pPIO->PIO_OER = LED_MASK;
+    // PIO Set Output Data Register
+    // turns off the four LEDs
+    pPIO->PIO_SODR = LED_MASK;
 
     // Select PA19 (pushbutton) to be FIQ function (Peripheral B)
     pPIO->PIO_BSR = SW1_MASK;
 
     // Set up the AIC registers for FIQ (pushbutton SW1)
-    volatile AT91PS_AIC pAIC = AT91C_BASE_AIC;			// pointer to AIC data structure
+    volatile AT91PS_AIC pAIC = AT91C_BASE_AIC;
-    pAIC->AIC_IDCR = (1<<AT91C_ID_FIQ);					// Disable FIQ interrupt in AIC Interrupt Disable Command Register			
+    // Disable FIQ interrupt in
-    pAIC->AIC_SMR[AT91C_ID_FIQ] =						// Set the interrupt source type in AIC Source 
+    // AIC Interrupt Disable Command Register
-        (AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED);  		// Mode Register[0]
+    pAIC->AIC_IDCR = (1<<AT91C_ID_FIQ);
-    pAIC->AIC_ICCR = (1<<AT91C_ID_FIQ); 				// Clear the FIQ interrupt in AIC Interrupt Clear Command Register
+    // Set the interrupt source type in
-    pAIC->AIC_IDCR = (0<<AT91C_ID_FIQ);					// Remove disable FIQ interrupt in AIC Interrupt Disable Command Register			
+    // AIC Source Mode Register[0]
-    pAIC->AIC_IECR = (1<<AT91C_ID_FIQ); 				// Enable the FIQ interrupt in AIC Interrupt Enable Command Register
+    pAIC->AIC_SMR[AT91C_ID_FIQ] =
+        (AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED);
+    // Clear the FIQ interrupt in
+    // AIC Interrupt Clear Command Register
+    pAIC->AIC_ICCR = (1<<AT91C_ID_FIQ);
+    // Remove disable FIQ interrupt in
+    // AIC Interrupt Disable Command Register
+    pAIC->AIC_IDCR = (0<<AT91C_ID_FIQ);
+    // Enable the FIQ interrupt in
+    // AIC Interrupt Enable Command Register
+    pAIC->AIC_IECR = (1<<AT91C_ID_FIQ);
 
 #if defined(BACDL_MSTP)
     RS485_Set_Baud_Rate(38400);
@@ -156,16 +174,18 @@ int	main (void) {
             LED3_Off_Enabled = true;
         }
         if (!LED_Timer_4) {
-            if  ((pPIO->PIO_ODSR & LED4) == LED4)
+            if  ((pPIO->PIO_ODSR & LED4) == LED4) {
-                pPIO->PIO_CODR = LED4;							// turn LED2 (DS2) on	
+                // turn LED2 (DS2) on
-            else
+                pPIO->PIO_CODR = LED4;
-                pPIO->PIO_SODR = LED4;							// turn LED2 (DS2) off
+            } else {
+                // turn LED2 (DS2) off
+                pPIO->PIO_SODR = LED4;
+            }
             /* wait */
             LED_Timer_4 = 1000;
         }
-        
+        // count # of times through the idle loop
-        IdleCount++;									// count # of times through the idle loop
+        IdleCount++;
-                                            
         /* BACnet handling */
         pdu_len = datalink_receive(&src, &pdu[0], MAX_MPDU, 0);
         if (pdu_len) {
@@ -176,8 +196,3 @@ int	main (void) {
         }
     }
 }
-
-
-
-
-

bacnet-stack/ports/at91sam7s/rs485.c

@@ -1,6 +1,7 @@
 /**************************************************************************
 *
 * Copyright (C) 2007 Steve Karg <skarg@users.sourceforge.net>
+* RS-485 initialization on AT91SAM7S inspired by Keil Eletronik serial.c
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the

bacnet-stack/ports/at91sam7s/timer.c

@@ -21,7 +21,7 @@
 //                        count =  46.928
 //
 //
-//     Therefore:  set Timer Channel 0 register RC to 9835
+//     Therefore:  set Timer Channel 0 register RC to 46*milliseconds
 //                 turn on capture mode WAVE = 0
 //                 enable the clock  CLKEN = 1
 //                 select TIMER_CLOCK5  TCCLKS = 100
@@ -57,8 +57,10 @@ void Timer0_Setup(int milliseconds) {
     //    SYNC = 0 (no effect)    <===== take  default
     //    SYNC = 1 (generate software trigger for all 3 timer channels simultaneously)
     //
-    AT91PS_TCB pTCB = AT91C_BASE_TCB;        // create a pointer to TC Global Register structure
+    // create a pointer to TC Global Register structure
-    pTCB->TCB_BCR = 0;                        // SYNC trigger not used
+    AT91PS_TCB pTCB = AT91C_BASE_TCB;
+    // SYNC trigger not used
+    pTCB->TCB_BCR = 0;
 
     //        TC Block Mode Register  TC_BMR    (read/write)
     //
@@ -82,7 +84,8 @@ void Timer0_Setup(int milliseconds) {
     //                 = 10 TIOA0 (PA00)
     //                 = 11 TIOA1 (PA26)
     //
-    pTCB->TCB_BMR = 0x15;                    // external clocks not used
+    // external clocks not used
+    pTCB->TCB_BMR = 0x15;
 
 
     //        TC Channel Control Register  TC_CCR    (read/write)
@@ -101,8 +104,10 @@ void Timer0_Setup(int milliseconds) {
     //  SWTRG = 0    no effect
     //  SWTRG = 1    software trigger aserted counter reset and clock starts   <===== we select this one
     //
-    AT91PS_TC pTC = AT91C_BASE_TC0;        // create a pointer to channel 0 Register structure
+    // create a pointer to channel 0 Register structure
-    pTC->TC_CCR = 0x5;                    // enable the clock    and start it
+    AT91PS_TC pTC = AT91C_BASE_TC0;
+    // enable the clock    and start it
+    pTC->TC_CCR = 0x5;
 
     //        TC Channel Mode Register  TC_CMR    (read/write)
     //
@@ -179,9 +184,10 @@ void Timer0_Setup(int milliseconds) {
     //          10 (falling edge of TIOA)
     //          11 (each edge of TIOA)
     //
-    pTC->TC_CMR = 0x4004;              // TCCLKS = 1 (TIMER_CLOCK5)
+    // TCCLKS = 1 (TIMER_CLOCK5)
     // CPCTRG = 1 (RC Compare resets the counter and restarts the clock)
     // WAVE   = 0 (Capture mode enabled)
+    pTC->TC_CMR = 0x4004;
 
     //        TC Register C     TC_RC   (read/write)   Compare Register 16-bits
     //
@@ -238,7 +244,8 @@ void Timer0_Setup(int milliseconds) {
     //  ETRGS    = 0  no effect    <===== take  default
     //             1  enable External Trigger interrupt
     //
-    pTC->TC_IER = 0x10;                // enable RC compare interrupt
+    // enable RC compare interrupt
+    pTC->TC_IER = 0x10;
 
     //        TC Interrupt Disable Register  TC_IDR    (write-only)
     //
@@ -272,7 +279,8 @@ void Timer0_Setup(int milliseconds) {
     //  ETRGS    = 0  no effect
     //             1  disable External Trigger interrupt    <===== we select this one
     //
-    pTC->TC_IDR = 0xEF;                // disable all except RC compare interrupt
+    // disable all except RC compare interrupt
+    pTC->TC_IDR = 0xEF;
 }
 
 //  *****************************************************************************
@@ -296,6 +304,15 @@ void Timer0IrqHandler (void) {
     Timer_Milliseconds++;
 }
 
+//  *****************************************************************************
+//
+//     Timer 0 Initialization
+//
+//  From James P Lynch main.c example code
+//  Modified by Steve Karg
+//    Moved timer startup code from main
+//    modified the peripheral clock init
+//  *****************************************************************************
 void TimerInit(void) {
     // enable the Timer0 peripheral clock
     volatile AT91PS_PMC    pPMC = AT91C_BASE_PMC;