Fixed line endings and SVN props with fixup.sh script
This commit is contained in:
skarg
@@ -1,297 +1,297 @@
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/**
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* \file
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*
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* \brief AVR XMEGA Analog to Digital Converter driver
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*
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* Copyright (C) 2010-2012 Atmel Corporation. All rights reserved.
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*
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||||
* \asf_license_start
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||||
*
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||||
* \page License
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||||
*
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||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
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||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
*
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||||
* \asf_license_stop
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*
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*/
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#include <compiler.h>
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#include <adc.h>
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/**
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* \ingroup adc_module_group
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* @{
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*/
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/** \name ADC interrupt callback function */
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/** @{ */
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#ifdef ADCA
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/**
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* \internal
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* \brief ADC A enable counter
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*
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* This is used to ensure that ADC A is not inadvertently disabled when its
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* module or channel configurations are updated.
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*/
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static uint8_t adca_enable_count;
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# ifdef CONFIG_ADC_CALLBACK_ENABLE
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/**
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* \internal
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* \brief ADC A interrupt callback function pointer
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*/
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adc_callback_t adca_callback;
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# endif
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#endif
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#ifdef ADCB
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/**
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* \internal
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* \brief ADC B enable counter
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*
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* This is used to ensure that ADC B is not inadvertently disabled when its
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* module or channel configurations are updated.
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*/
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static uint8_t adcb_enable_count;
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# ifdef CONFIG_ADC_CALLBACK_ENABLE
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/**
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* \internal
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* \brief ADC B interrupt callback function pointer
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*/
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adc_callback_t adcb_callback;
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# endif
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#endif
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#if defined(CONFIG_ADC_CALLBACK_ENABLE) || defined(__DOXYGEN__)
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/**
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* \brief Set ADC interrupt callback function
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*
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* Sets a new callback function for interrupts on the specified ADC.
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*
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* \param adc Pointer to ADC module.
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* \param callback Pointer to the callback function to set.
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*/
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void adc_set_callback(ADC_t * adc,
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adc_callback_t callback)
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{
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irqflags_t flags;
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Assert(callback);
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flags = cpu_irq_save();
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#ifdef ADCA
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if ((uintptr_t) adc == (uintptr_t) & ADCA) {
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adca_callback = callback;
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} else
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#endif
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#ifdef ADCB
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if ((uintptr_t) adc == (uintptr_t) & ADCB) {
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adcb_callback = callback;
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} else
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#endif
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{
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Assert(0);
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}
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cpu_irq_restore(flags);
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}
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#endif /* CONFIG_ADC_CALLBACK_ENABLE */
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/** @} */
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/** \name Internal functions for driver */
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/** @{ */
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/**
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* \internal
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* \brief Enable peripheral clock for ADC
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*
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* Checks if the enable count for the ADC is zero, then increments it. If the
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* count was zero, the peripheral clock is enabled. Otherwise, it is already
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* enabled.
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*
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* \param adc Pointer to ADC module.
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*/
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void adc_enable_clock(ADC_t * adc);
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void adc_enable_clock(ADC_t * adc)
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{
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#ifdef ADCA
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if ((uintptr_t) adc == (uintptr_t) (&ADCA)) {
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Assert(adca_enable_count < 0xff);
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if (!adca_enable_count++) {
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sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC);
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}
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} else
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#endif
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#ifdef ADCB
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if ((uintptr_t) adc == (uintptr_t) (&ADCB)) {
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Assert(adcb_enable_count < 0xff);
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if (!adcb_enable_count++) {
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sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC);
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}
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} else
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#endif
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{
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Assert(0);
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}
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}
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/**
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* \internal
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* \brief Disable peripheral clock for ADC
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*
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* Decrements the enable count for the ADC, then disables its peripheral clock
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* if the count hit zero. If the count did not hit zero, it indicates the ADC is
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* enabled.
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*
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* \param adc Pointer to ADC module
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*/
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void adc_disable_clock(ADC_t * adc);
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void adc_disable_clock(ADC_t * adc)
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{
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#ifdef ADCA
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if ((uintptr_t) adc == (uintptr_t) (&ADCA)) {
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Assert(adca_enable_count);
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if (!--adca_enable_count) {
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sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_ADC);
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}
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} else
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#endif
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#ifdef ADCB
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if ((uintptr_t) adc == (uintptr_t) (&ADCB)) {
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Assert(adcb_enable_count);
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if (!--adcb_enable_count) {
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sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_ADC);
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}
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} else
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#endif
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{
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Assert(0);
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}
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}
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/** @} */
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/** \name ADC module management */
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/** @{ */
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/**
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* \brief Enable ADC
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*
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* Enables the ADC and locks IDLE mode for the sleep manager.
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*
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* \param adc Pointer to ADC module
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*
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* \note To ensure accurate conversions, please wait for at least
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* the specified start-up time between enabling the ADC module, and starting
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* a conversion. For most XMEGA devices the start-up time is specified
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* to be a maximum of 24 ADC clock cycles. Please verify the start-up time for
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* the device in use.
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*/
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void adc_enable(ADC_t * adc)
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{
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irqflags_t flags = cpu_irq_save();
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adc_enable_clock(adc);
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adc->CTRLA |= ADC_ENABLE_bm;
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cpu_irq_restore(flags);
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sleepmgr_lock_mode(SLEEPMGR_IDLE);
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}
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/**
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* \brief Disable ADC
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*
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* Disables the ADC and unlocks IDLE mode for the sleep manager.
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*
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* \param adc Pointer to ADC module
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*/
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void adc_disable(ADC_t * adc)
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{
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irqflags_t flags = cpu_irq_save();
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adc->CTRLA &= ~ADC_ENABLE_bm;
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adc_disable_clock(adc);
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cpu_irq_restore(flags);
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sleepmgr_unlock_mode(SLEEPMGR_IDLE);
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}
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/**
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* \brief Check if the ADC is enabled
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*
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* \param adc Pointer to ADC module.
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*
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* \retval true if ADC is enabled.
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* \retval false if ADC is disabled.
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*/
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bool adc_is_enabled(ADC_t * adc)
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{
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/* It is sufficient to return the state of the ADC enable counters
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* since all driver functions that change the counts are protected
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* against interrupts and only the enable/disable functions leave the
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* counts incremented/decremented upon return.
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*/
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#ifdef ADCA
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if ((uintptr_t) adc == (uintptr_t) & ADCA) {
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return adca_enable_count;
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} else
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#endif
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#ifdef ADCB
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if ((uintptr_t) adc == (uintptr_t) & ADCB) {
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return adcb_enable_count;
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} else
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#endif
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{
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Assert(0);
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return false;
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}
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}
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/** @} */
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/** @} */
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/**
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* \file
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*
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* \brief AVR XMEGA Analog to Digital Converter driver
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*
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* Copyright (C) 2010-2012 Atmel Corporation. All rights reserved.
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*
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||||
* \asf_license_start
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||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
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#include <compiler.h>
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#include <adc.h>
|
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|
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/**
|
||||
* \ingroup adc_module_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name ADC interrupt callback function */
|
||||
/** @{ */
|
||||
#ifdef ADCA
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ADC A enable counter
|
||||
*
|
||||
* This is used to ensure that ADC A is not inadvertently disabled when its
|
||||
* module or channel configurations are updated.
|
||||
*/
|
||||
static uint8_t adca_enable_count;
|
||||
|
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# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
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/**
|
||||
* \internal
|
||||
* \brief ADC A interrupt callback function pointer
|
||||
*/
|
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adc_callback_t adca_callback;
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|
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# endif
|
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#endif
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|
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#ifdef ADCB
|
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|
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/**
|
||||
* \internal
|
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* \brief ADC B enable counter
|
||||
*
|
||||
* This is used to ensure that ADC B is not inadvertently disabled when its
|
||||
* module or channel configurations are updated.
|
||||
*/
|
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static uint8_t adcb_enable_count;
|
||||
|
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# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ADC B interrupt callback function pointer
|
||||
*/
|
||||
adc_callback_t adcb_callback;
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADC_CALLBACK_ENABLE) || defined(__DOXYGEN__)
|
||||
|
||||
/**
|
||||
* \brief Set ADC interrupt callback function
|
||||
*
|
||||
* Sets a new callback function for interrupts on the specified ADC.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param callback Pointer to the callback function to set.
|
||||
*/
|
||||
void adc_set_callback(ADC_t * adc,
|
||||
adc_callback_t callback)
|
||||
{
|
||||
irqflags_t flags;
|
||||
|
||||
Assert(callback);
|
||||
|
||||
flags = cpu_irq_save();
|
||||
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
adca_callback = callback;
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
adcb_callback = callback;
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
}
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ADC_CALLBACK_ENABLE */
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Internal functions for driver */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Enable peripheral clock for ADC
|
||||
*
|
||||
* Checks if the enable count for the ADC is zero, then increments it. If the
|
||||
* count was zero, the peripheral clock is enabled. Otherwise, it is already
|
||||
* enabled.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
*/
|
||||
void adc_enable_clock(ADC_t * adc);
|
||||
|
||||
void adc_enable_clock(ADC_t * adc)
|
||||
{
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) (&ADCA)) {
|
||||
Assert(adca_enable_count < 0xff);
|
||||
if (!adca_enable_count++) {
|
||||
sysclk_enable_module(SYSCLK_PORT_A, SYSCLK_ADC);
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) (&ADCB)) {
|
||||
Assert(adcb_enable_count < 0xff);
|
||||
if (!adcb_enable_count++) {
|
||||
sysclk_enable_module(SYSCLK_PORT_B, SYSCLK_ADC);
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Disable peripheral clock for ADC
|
||||
*
|
||||
* Decrements the enable count for the ADC, then disables its peripheral clock
|
||||
* if the count hit zero. If the count did not hit zero, it indicates the ADC is
|
||||
* enabled.
|
||||
*
|
||||
* \param adc Pointer to ADC module
|
||||
*/
|
||||
void adc_disable_clock(ADC_t * adc);
|
||||
|
||||
void adc_disable_clock(ADC_t * adc)
|
||||
{
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) (&ADCA)) {
|
||||
Assert(adca_enable_count);
|
||||
if (!--adca_enable_count) {
|
||||
sysclk_disable_module(SYSCLK_PORT_A, SYSCLK_ADC);
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) (&ADCB)) {
|
||||
Assert(adcb_enable_count);
|
||||
if (!--adcb_enable_count) {
|
||||
sysclk_disable_module(SYSCLK_PORT_B, SYSCLK_ADC);
|
||||
}
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name ADC module management */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \brief Enable ADC
|
||||
*
|
||||
* Enables the ADC and locks IDLE mode for the sleep manager.
|
||||
*
|
||||
* \param adc Pointer to ADC module
|
||||
*
|
||||
* \note To ensure accurate conversions, please wait for at least
|
||||
* the specified start-up time between enabling the ADC module, and starting
|
||||
* a conversion. For most XMEGA devices the start-up time is specified
|
||||
* to be a maximum of 24 ADC clock cycles. Please verify the start-up time for
|
||||
* the device in use.
|
||||
*/
|
||||
void adc_enable(ADC_t * adc)
|
||||
{
|
||||
irqflags_t flags = cpu_irq_save();
|
||||
adc_enable_clock(adc);
|
||||
adc->CTRLA |= ADC_ENABLE_bm;
|
||||
cpu_irq_restore(flags);
|
||||
|
||||
sleepmgr_lock_mode(SLEEPMGR_IDLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable ADC
|
||||
*
|
||||
* Disables the ADC and unlocks IDLE mode for the sleep manager.
|
||||
*
|
||||
* \param adc Pointer to ADC module
|
||||
*/
|
||||
void adc_disable(ADC_t * adc)
|
||||
{
|
||||
irqflags_t flags = cpu_irq_save();
|
||||
adc->CTRLA &= ~ADC_ENABLE_bm;
|
||||
adc_disable_clock(adc);
|
||||
cpu_irq_restore(flags);
|
||||
|
||||
sleepmgr_unlock_mode(SLEEPMGR_IDLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the ADC is enabled
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
*
|
||||
* \retval true if ADC is enabled.
|
||||
* \retval false if ADC is disabled.
|
||||
*/
|
||||
bool adc_is_enabled(ADC_t * adc)
|
||||
{
|
||||
/* It is sufficient to return the state of the ADC enable counters
|
||||
* since all driver functions that change the counts are protected
|
||||
* against interrupts and only the enable/disable functions leave the
|
||||
* counts incremented/decremented upon return.
|
||||
*/
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
return adca_enable_count;
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
return adcb_enable_count;
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,370 +1,370 @@
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief AVR XMEGA A/AU specific ADC driver implementation
|
||||
*
|
||||
* Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "../adc.h"
|
||||
|
||||
/**
|
||||
* \ingroup adc_module_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Internal functions for driver */
|
||||
/** @{ */
|
||||
extern void adc_enable_clock(ADC_t * adc);
|
||||
extern void adc_disable_clock(ADC_t * adc);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name ADC interrupt callback function */
|
||||
/** @{ */
|
||||
|
||||
#ifdef ADCA
|
||||
# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
||||
extern adc_callback_t adca_callback;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 0 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH0_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH0, adc_get_result(&ADCA, ADC_CH0));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 1 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH1_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH1, adc_get_result(&ADCA, ADC_CH1));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 2 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH2_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH2, adc_get_result(&ADCA, ADC_CH2));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 3 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH3_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH3, adc_get_result(&ADCA, ADC_CH3));
|
||||
}
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
||||
extern adc_callback_t adcb_callback;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 0 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH0_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH0, adc_get_result(&ADCB, ADC_CH0));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 1 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH1_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH1, adc_get_result(&ADCB, ADC_CH1));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 2 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH2_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH2, adc_get_result(&ADCB, ADC_CH2));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 3 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH3_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH3, adc_get_result(&ADCB, ADC_CH3));
|
||||
}
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name ADC module configuration */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \brief Write configuration to ADC module
|
||||
*
|
||||
* Disables the ADC and flushes its pipeline before writing the specified
|
||||
* configuration and factory calibration value to it. If the ADC was enabled
|
||||
* upon entry of the function, it is enabled upon function return.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param conf Pointer to ADC module configuration.
|
||||
*/
|
||||
void adc_write_configuration(ADC_t * adc,
|
||||
const struct adc_config *conf)
|
||||
{
|
||||
uint16_t cal;
|
||||
uint8_t enable;
|
||||
irqflags_t flags;
|
||||
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
cal = adc_get_calibration_data(ADC_CAL_ADCA);
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
cal = adc_get_calibration_data(ADC_CAL_ADCB);
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
return;
|
||||
}
|
||||
|
||||
flags = cpu_irq_save();
|
||||
adc_enable_clock(adc);
|
||||
enable = adc->CTRLA & ADC_ENABLE_bm;
|
||||
|
||||
adc->CTRLA = ADC_FLUSH_bm;
|
||||
adc->CAL = cal;
|
||||
adc->CMP = conf->cmp;
|
||||
adc->REFCTRL = conf->refctrl;
|
||||
adc->PRESCALER = conf->prescaler;
|
||||
adc->EVCTRL = conf->evctrl;
|
||||
adc->CTRLB = conf->ctrlb;
|
||||
|
||||
adc->CTRLA = enable | conf->ctrla;
|
||||
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read configuration from ADC module
|
||||
*
|
||||
* Reads out the current configuration of the ADC module to the specified
|
||||
* buffer.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param conf Pointer to ADC module configuration.
|
||||
*/
|
||||
void adc_read_configuration(ADC_t * adc,
|
||||
struct adc_config *conf)
|
||||
{
|
||||
irqflags_t flags = cpu_irq_save();
|
||||
|
||||
adc_enable_clock(adc);
|
||||
|
||||
conf->ctrla = adc->CTRLA & ADC_DMASEL_gm;
|
||||
|
||||
conf->cmp = adc->CMP;
|
||||
conf->refctrl = adc->REFCTRL;
|
||||
conf->prescaler = adc->PRESCALER;
|
||||
conf->evctrl = adc->EVCTRL;
|
||||
conf->ctrlb = adc->CTRLB;
|
||||
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \ingroup adc_channel_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name ADC channel configuration */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \brief Write configuration to ADC channel
|
||||
*
|
||||
* Writes the specified configuration to the ADC channel.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param ch_mask Mask of ADC channel(s):
|
||||
* \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel
|
||||
* can be given in mask)
|
||||
* \param ch_conf Pointer to ADC channel configuration.
|
||||
*
|
||||
* \note The specified ADC's callback function must be set before this function
|
||||
* is called if callbacks are enabled and interrupts are enabled in the
|
||||
* channel configuration.
|
||||
*/
|
||||
void adcch_write_configuration(ADC_t * adc,
|
||||
uint8_t ch_mask,
|
||||
const struct adc_channel_config *ch_conf)
|
||||
{
|
||||
ADC_CH_t *adc_ch;
|
||||
irqflags_t flags;
|
||||
|
||||
adc_ch = adc_get_channel(adc, ch_mask);
|
||||
|
||||
flags = cpu_irq_save();
|
||||
|
||||
#if defined(CONFIG_ADC_CALLBACK_ENABLE) && defined(_ASSERT_ENABLE_)
|
||||
if ((adc_ch->INTCTRL & ADC_CH_INTLVL_gm) != ADC_CH_INTLVL_OFF_gc) {
|
||||
# ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
Assert(adca_callback);
|
||||
} else
|
||||
# endif
|
||||
|
||||
# ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
Assert(adcb_callback);
|
||||
} else
|
||||
# endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
adc_enable_clock(adc);
|
||||
adc_ch->CTRL = ch_conf->ctrl;
|
||||
adc_ch->INTCTRL = ch_conf->intctrl;
|
||||
adc_ch->MUXCTRL = ch_conf->muxctrl;
|
||||
if (ch_mask & ADC_CH0) {
|
||||
/* USB devices has channel scan available on ADC channel 0 */
|
||||
adc_ch->SCAN = ch_conf->scan;
|
||||
}
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read configuration from ADC channel
|
||||
*
|
||||
* Reads out the current configuration from the ADC channel to the specified
|
||||
* buffer.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param ch_mask Mask of ADC channel(s):
|
||||
* \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel
|
||||
* can be given in mask)
|
||||
* \param ch_conf Pointer to ADC channel configuration.
|
||||
*/
|
||||
void adcch_read_configuration(ADC_t * adc,
|
||||
uint8_t ch_mask,
|
||||
struct adc_channel_config *ch_conf)
|
||||
{
|
||||
ADC_CH_t *adc_ch;
|
||||
irqflags_t flags;
|
||||
|
||||
adc_ch = adc_get_channel(adc, ch_mask);
|
||||
|
||||
flags = cpu_irq_save();
|
||||
|
||||
adc_enable_clock(adc);
|
||||
ch_conf->ctrl = adc_ch->CTRL;
|
||||
ch_conf->intctrl = adc_ch->INTCTRL;
|
||||
ch_conf->muxctrl = adc_ch->MUXCTRL;
|
||||
if (ch_mask & ADC_CH0) {
|
||||
/* USB devices has channel scan available on ADC channel 0 */
|
||||
ch_conf->scan = adc_ch->SCAN;
|
||||
}
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief AVR XMEGA A/AU specific ADC driver implementation
|
||||
*
|
||||
* Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "../adc.h"
|
||||
|
||||
/**
|
||||
* \ingroup adc_module_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Internal functions for driver */
|
||||
/** @{ */
|
||||
extern void adc_enable_clock(ADC_t * adc);
|
||||
extern void adc_disable_clock(ADC_t * adc);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name ADC interrupt callback function */
|
||||
/** @{ */
|
||||
|
||||
#ifdef ADCA
|
||||
# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
||||
extern adc_callback_t adca_callback;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 0 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH0_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH0, adc_get_result(&ADCA, ADC_CH0));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 1 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH1_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH1, adc_get_result(&ADCA, ADC_CH1));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 2 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH2_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH2, adc_get_result(&ADCA, ADC_CH2));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 3 on ADC A
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCA_CH3_vect)
|
||||
{
|
||||
adca_callback(&ADCA, ADC_CH3, adc_get_result(&ADCA, ADC_CH3));
|
||||
}
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
# ifdef CONFIG_ADC_CALLBACK_ENABLE
|
||||
|
||||
extern adc_callback_t adcb_callback;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 0 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH0_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH0, adc_get_result(&ADCB, ADC_CH0));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 1 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH1_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH1, adc_get_result(&ADCB, ADC_CH1));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 2 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH2_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH2, adc_get_result(&ADCB, ADC_CH2));
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief ISR for channel 3 on ADC B
|
||||
*
|
||||
* Calls the callback function that has been set for the ADC when the channel's
|
||||
* interrupt flag is set, if its interrupt has been enabled.
|
||||
*/
|
||||
ISR(ADCB_CH3_vect)
|
||||
{
|
||||
adcb_callback(&ADCB, ADC_CH3, adc_get_result(&ADCB, ADC_CH3));
|
||||
}
|
||||
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name ADC module configuration */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \brief Write configuration to ADC module
|
||||
*
|
||||
* Disables the ADC and flushes its pipeline before writing the specified
|
||||
* configuration and factory calibration value to it. If the ADC was enabled
|
||||
* upon entry of the function, it is enabled upon function return.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param conf Pointer to ADC module configuration.
|
||||
*/
|
||||
void adc_write_configuration(ADC_t * adc,
|
||||
const struct adc_config *conf)
|
||||
{
|
||||
uint16_t cal;
|
||||
uint8_t enable;
|
||||
irqflags_t flags;
|
||||
|
||||
#ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
cal = adc_get_calibration_data(ADC_CAL_ADCA);
|
||||
} else
|
||||
#endif
|
||||
|
||||
#ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
cal = adc_get_calibration_data(ADC_CAL_ADCB);
|
||||
} else
|
||||
#endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
return;
|
||||
}
|
||||
|
||||
flags = cpu_irq_save();
|
||||
adc_enable_clock(adc);
|
||||
enable = adc->CTRLA & ADC_ENABLE_bm;
|
||||
|
||||
adc->CTRLA = ADC_FLUSH_bm;
|
||||
adc->CAL = cal;
|
||||
adc->CMP = conf->cmp;
|
||||
adc->REFCTRL = conf->refctrl;
|
||||
adc->PRESCALER = conf->prescaler;
|
||||
adc->EVCTRL = conf->evctrl;
|
||||
adc->CTRLB = conf->ctrlb;
|
||||
|
||||
adc->CTRLA = enable | conf->ctrla;
|
||||
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read configuration from ADC module
|
||||
*
|
||||
* Reads out the current configuration of the ADC module to the specified
|
||||
* buffer.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param conf Pointer to ADC module configuration.
|
||||
*/
|
||||
void adc_read_configuration(ADC_t * adc,
|
||||
struct adc_config *conf)
|
||||
{
|
||||
irqflags_t flags = cpu_irq_save();
|
||||
|
||||
adc_enable_clock(adc);
|
||||
|
||||
conf->ctrla = adc->CTRLA & ADC_DMASEL_gm;
|
||||
|
||||
conf->cmp = adc->CMP;
|
||||
conf->refctrl = adc->REFCTRL;
|
||||
conf->prescaler = adc->PRESCALER;
|
||||
conf->evctrl = adc->EVCTRL;
|
||||
conf->ctrlb = adc->CTRLB;
|
||||
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \ingroup adc_channel_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name ADC channel configuration */
|
||||
/** @{ */
|
||||
|
||||
/**
|
||||
* \brief Write configuration to ADC channel
|
||||
*
|
||||
* Writes the specified configuration to the ADC channel.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param ch_mask Mask of ADC channel(s):
|
||||
* \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel
|
||||
* can be given in mask)
|
||||
* \param ch_conf Pointer to ADC channel configuration.
|
||||
*
|
||||
* \note The specified ADC's callback function must be set before this function
|
||||
* is called if callbacks are enabled and interrupts are enabled in the
|
||||
* channel configuration.
|
||||
*/
|
||||
void adcch_write_configuration(ADC_t * adc,
|
||||
uint8_t ch_mask,
|
||||
const struct adc_channel_config *ch_conf)
|
||||
{
|
||||
ADC_CH_t *adc_ch;
|
||||
irqflags_t flags;
|
||||
|
||||
adc_ch = adc_get_channel(adc, ch_mask);
|
||||
|
||||
flags = cpu_irq_save();
|
||||
|
||||
#if defined(CONFIG_ADC_CALLBACK_ENABLE) && defined(_ASSERT_ENABLE_)
|
||||
if ((adc_ch->INTCTRL & ADC_CH_INTLVL_gm) != ADC_CH_INTLVL_OFF_gc) {
|
||||
# ifdef ADCA
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCA) {
|
||||
Assert(adca_callback);
|
||||
} else
|
||||
# endif
|
||||
|
||||
# ifdef ADCB
|
||||
if ((uintptr_t) adc == (uintptr_t) & ADCB) {
|
||||
Assert(adcb_callback);
|
||||
} else
|
||||
# endif
|
||||
|
||||
{
|
||||
Assert(0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
adc_enable_clock(adc);
|
||||
adc_ch->CTRL = ch_conf->ctrl;
|
||||
adc_ch->INTCTRL = ch_conf->intctrl;
|
||||
adc_ch->MUXCTRL = ch_conf->muxctrl;
|
||||
if (ch_mask & ADC_CH0) {
|
||||
/* USB devices has channel scan available on ADC channel 0 */
|
||||
adc_ch->SCAN = ch_conf->scan;
|
||||
}
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read configuration from ADC channel
|
||||
*
|
||||
* Reads out the current configuration from the ADC channel to the specified
|
||||
* buffer.
|
||||
*
|
||||
* \param adc Pointer to ADC module.
|
||||
* \param ch_mask Mask of ADC channel(s):
|
||||
* \arg \c ADC_CHn , where \c n specifies the channel. (Only a single channel
|
||||
* can be given in mask)
|
||||
* \param ch_conf Pointer to ADC channel configuration.
|
||||
*/
|
||||
void adcch_read_configuration(ADC_t * adc,
|
||||
uint8_t ch_mask,
|
||||
struct adc_channel_config *ch_conf)
|
||||
{
|
||||
ADC_CH_t *adc_ch;
|
||||
irqflags_t flags;
|
||||
|
||||
adc_ch = adc_get_channel(adc, ch_mask);
|
||||
|
||||
flags = cpu_irq_save();
|
||||
|
||||
adc_enable_clock(adc);
|
||||
ch_conf->ctrl = adc_ch->CTRL;
|
||||
ch_conf->intctrl = adc_ch->INTCTRL;
|
||||
ch_conf->muxctrl = adc_ch->MUXCTRL;
|
||||
if (ch_mask & ADC_CH0) {
|
||||
/* USB devices has channel scan available on ADC channel 0 */
|
||||
ch_conf->scan = adc_ch->SCAN;
|
||||
}
|
||||
adc_disable_clock(adc);
|
||||
|
||||
cpu_irq_restore(flags);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
Reference in New Issue
Block a user